2008-2016 Microchip Technology Inc. DS20002123F-page 15
25AA02E48/25AA02E64
4.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 4-1.
TABLE 4-1: PIN FUNCTION TABLE
4.1 Chip Select (CS)
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already
initiated or in progress will be completed, regardless of
the CS input signal. If CS is brought high during a
program cycle, the device will go into Standby mode as
soon as the programming cycle is complete. When the
device is deselected, SO goes to the high-impedance
state, allowing multiple parts to share the same SPI
bus. A low-to-high transition on CS
after a valid write
sequence initiates an internal write cycle. After
power-up, a low level on CS is required prior to any
sequence being initiated.
4.2 Serial Output (SO)
The SO pin is used to transfer data out of the
25AA02EXX. During a read cycle, data is shifted out on
this pin after the falling edge of the serial clock.
4.3 Write-Protect (WP)
The WP pin is a hardware write-protect input pin.
When it is low, all writes to the array or STATUS
register are disabled, but any other operations
function normally. When WP
is high, all functions,
including nonvolatile writes, operate normally. At any
time when WP is low, the write enable Reset latch will
be reset and programming will be inhibited. However,
if a write cycle is already in progress, WP
going low
will not change or disable the write cycle. See
Table 2-4 for the Write-Protect Functionality Matrix.
4.4 Serial Input (SI)
The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.
4.5 Serial Clock (SCK)
The SCK is used to synchronize the communication
between a master and the 25AA02EXX. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
4.6 Hold (HOLD)
The HOLD pin is used to suspend transmission to the
25AA02EXX while in the middle of a serial sequence
without having to retransmit the entire sequence again.
It must be held high any time this function is not being
used. Once the device is selected and a serial
sequence is underway, the HOLD
pin may be pulled
low to pause further serial communication without
resetting the serial sequence. The HOLD pin must be
brought low while SCK is low, otherwise the HOLD
function will not be invoked until the next SCK
high-to-low transition. The 25AA02EXX must remain
selected during this sequence. The SI, SCK and SO
pins are in a high-impedance state during the time the
device is paused and transitions on these pins will be
ignored. To resume serial communication, HOLD
must
be brought high while the SCK pin is low, otherwise
serial communication will not resume. Lowering the
HOLD line at any time will tri-state the SO line.
Name SOIC SOT-23 Function
CS
1 5 Chip Select Input
SO 2 4 Serial Data Output
WP
3 — Write-Protect Pin
V
SS 4 2 Ground
SI 5 3 Serial Data Input
SCK 6 1 Serial Clock Input
HOLD
7 — Hold Input
V
CC 8 6 Supply Voltage
