PCF8564A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 26 August 2013 28 of 48
NXP Semiconductors
PCF8564A
Real time clock and calendar
14. Static characteristics
Table 30. Static characteristics
V
DD
= 1.8 V to 5.5 V; V
SS
=0V; T
amb
=
40
C to +85
C; f
osc
= 32.768 kHz; quartz R
s
=40k
; C
L
= 8 pF; unless otherwise
specified.
Symbol Parameter Conditions Min Typ Max Unit
Supplies
V
DD
supply voltage interface inactive; T
amb
=25C
[1]
1.0- 5.5V
interface active; f
SCL
= 400 kHz
[1]
1.8- 5.5V
for clock data integrity;
T
amb
=25C
V
low
-5.5V
I
DD
supply current interface active
f
SCL
=400kHz - - 800 A
f
SCL
=100kHz - - 200 A
interface inactive (f
SCL
=0Hz);
CLKOUT disabled; T
amb
=25C
[2]
[3]
[4]
V
DD
= 5.0 V - 275 550 nA
V
DD
= 3.0 V - 250 500 nA
V
DD
= 2.0 V - 225 450 nA
interface inactive (f
SCL
=0Hz);
CLKOUT disabled;
T
amb
= 40 Cto +85C
[2]
[3]
[4]
V
DD
= 5.0 V - 500 750 nA
V
DD
= 3.0 V - 400 650 nA
V
DD
= 2.0 V - 400 600 nA
interface inactive (f
SCL
=0Hz);
CLKOUT enabled at 32 kHz;
T
amb
=25C
[4]
[5]
[6]
V
DD
= 5.0 V - 1500 3000 nA
V
DD
= 3.0 V - 1000 2000 nA
V
DD
= 2.0 V - 700 1400 nA
interface inactive (f
SCL
=0Hz);
CLKOUT enabled at 32 kHz;
T
amb
= 40 Cto +85C
[4]
[5]
[6]
V
DD
= 5.0 V - 1700 3400 nA
V
DD
= 3.0 V - 1100 2200 nA
V
DD
= 2.0 V - 800 1600 nA
Inputs
V
I
input voltage on pins SDA and SCL 0.5 - +5.5 V
on pins CLKOE and CLKOUT
(test mode)
0.5 - V
DD
+0.5 V
V
IL
LOW-level input
voltage
- - 0.3V
DD
V
V
IH
HIGH-level input
voltage
0.7V
DD
--V
PCF8564A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 26 August 2013 29 of 48
NXP Semiconductors
PCF8564A
Real time clock and calendar
[1] For reliable oscillator start-up at power-on: V
DD(po)min
=V
DD(min)
+0.3V.
[2] Timer source clock =
1
60
Hz.
[3] CLKOUT disabled (FE = 0 or CLKOE = 0).
[4] V
IL
and V
IH
with an input voltage swing of V
SS
to V
DD
.
[5] CLKOUT is open circuit.
[6] Current consumption when the CLKOUT pin is enabled is a function of the load on the pin, the output frequency, and the supply voltage.
The additional current consumption for a given load is calculated from: .
[7] Tested on sample basis.
I
LI
input leakage current V
I
= V
SS
or V
DD
-0-A
post ESD event 1- +1A
C
i
input capacitance
[7]
--7pF
Outputs
V
O
output voltage on pin CLKOUT 0.5 - V
DD
+0.5 V
on pin INT
0.5 - +5.5 V
I
OL
LOW-level output
current
on pin SDA;
V
OL
=0.4V; V
DD
=5V
3- - mA
on pin INT
;
V
OL
=0.4V; V
DD
=5V
1- - mA
on pin CLKOUT:
V
OL
=0.4V; V
DD
=5V
1- - mA
I
OH
HIGH-level output
current
on pin CLKOUT;
V
OH
=4.6V; V
DD
=5V
1- - mA
I
LO
output leakage current V
O
=V
SS
or V
DD
-0-A
post ESD event 1- +1A
Voltage detector
V
low
low voltage T
amb
=25C-0.91.0V
Table 30. Static characteristics
…continued
V
DD
= 1.8 V to 5.5 V; V
SS
=0V; T
amb
=
40
C to +85
C; f
osc
= 32.768 kHz; quartz R
s
=40k
; C
L
= 8 pF; unless otherwise
specified.
Symbol Parameter Conditions Min Typ Max Unit
I
DD
CV
DD
F
CLKOUT
=
PCF8564A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 26 August 2013 30 of 48
NXP Semiconductors
PCF8564A
Real time clock and calendar
T
amb
=25C; timer = 1 minute; CLKOUT disabled. T
amb
=25C; timer = 1 minute; CLKOUT = 32 kHz.
Fig 21. I
DD
as a function of V
DD
Fig 22. I
DD
as a function of V
DD
V
DD
= 3 V; timer = 1 minute; CLKOUT = 32 kHz. T
amb
=25C; normalized to V
DD
=3V.
Fig 23. I
DD
as a function of temperature Fig 24. Frequency deviation as a function of V
DD
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PCF8564ACX9/B/1,02

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC RTC CLK/CALENDAR I2C DIE
Lifecycle:
New from this manufacturer.
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