CS1600
10 DS904F1
5.7 Brownout Protection
As an added protection to the PFC boost stage, the CS1600
includes a failure mechanism that detects high average
currents that occur under abnormal brownout conditions. The
brownout protection feature monitors the V
rect
input signal and
suspends the gate-drive switching when a brownout threshold
breach is detected. Under normal conditions, the CS1600 will
never reach the brownout threshold, as the PFC stage is
automatically protected by the power limitation of Equation 2,
see section 5.4 Output Power and PFC Boost Inductor on
page 9. In the event that the boost inductor is significantly less
than the target value of L
B
, the brownout protection threshold
may be breached. However, under normal operating
conditions with proper boost inductance, this will not occur.
If a brownout event is detected, the CS1600 enters standby,
and upon recovery from brownout enters normal operation
mode. In order to avoid an erroneous brownout detection,
hysteresis and minimum detection time is implemented to
avoid brownout detection during input transients. Figure 5.8
illustrates the brownout entry and exit timing. If the input line
voltage is lower than the threshold for a fixed period of time, a
brownout is declared. The measured voltage decreases at a
rate of 5 V / half-line-cycle (~8 ms for 60 Hz line frequency).
The CS1600 triggers a timer when the measured voltage falls
below the lower brownout threshold. The IC asserts the
brownout protection and stops the gate-drive switching only if
the timer reaches more than 56 ms, which is determined by
the minimum line frequency..
Figure 18. Brownout Sequence
During the brownout state, the device continues monitoring
the input line voltage. The device exits the brownout state
when the input voltage peak value exceeds the brownout
upper threshold for at least 56 ms.
The maximum response time of the brownout protection
normally happens at light-load conditions. It can be calculated
by the following equation:
5.8 Overvoltage Protection
The overvoltage protection (OVP) will trigger immediately and
stop the gate drive when the current into the IFB pin (I
OVP
)
exceeds 105% of the reference current value (I
ref
). The IC
resumes gate drive switching when the link voltage drops
below V
OVP
–V
OVP(HY)
.
5.9 Open/Short Loop Protection
If the PFC output sense resistor R
IFB
fails (open or short to
GND), the measured output voltage decreases at a slew rate
of about 2V / μs, which is determined by ADC sampling rate.
The IC stops the gate drive when the measured output voltage
is lower than the measured line voltage. The IC resumes gate
drive switching when the current into the IFB pin becomes
larger than or equal to the current into the IAC pin and V
link
is
greater than the peak of the line voltage (V
rect(pk)
). The
maximum response time of open/short loop protection for R
IFB
is about 150 μs in the CS1600.
If the PFC input sense resistor R
IAC
fails (open or short to
GND), the current reference signal supplied to the IC on pin
IAC falls to zero.
56 ms
56 ms
Start
Timer
Enter Standby Exit Standby
Upper
Lower
Brownout
Thresholds
Start Timer
T
Brownout
116.8 ms=
[Eq.6]
T
Brownout
8ms
8ms
5V
------------
128 V V
BP th()
–()56ms++=
8=
8
5
---
128 95–()56++
