12
For more information www.linear.com/LTC2914
Threshold Accuracy
Reset threshold accuracy is important in a supply-sensitive
system. Ideally, such a system resets only if supply voltages
fall outside the exact thresholds for a specified margin.
All LTC2914 inputs have a relative threshold accuracy of
±1.5% over the full operating temperature range.
For example, when the LTC2914 is programmed to moni
-
tor a 5V
input with a 10% tolerance, the desired UV trip
point is 4.5V. Because of the ±1.5% relative accuracy of
the LTC2914, the UV trip point is between 4.433V and
4.567V which is 4.5V ±1.5%.
Likewise, the accuracy of the resistances chosen for R
A
,
R
B
and R
C
affect the UV and OV trip points as well. Us-
ing the example just given, if the resistances used to set
the UV
trip point have 1% accuracy, the UV trip range
is between 4.354V and 4.650V. This is illustrated in the
following calculations.
The UV trip point is given as:
V
UV
= 0.5V 1+
R
C
R
+R
The two extreme conditions, with a relative accuracy of
1.5% and resistance accuracy of 1%, result in:
V
UV(MIN)
= 0.5V • 0.985• 1+
R
C
•0.99
R
A
+R
B
( )
•1.01
and
V
UV(MAX)
= 0.5V •1.015• 1+
R
C
•1.01
R
A
+R
B
( )
•0.99
For a desired trip point of 4.5V,
R
C
R
A
+R
B
= 8
Therefore,
V
UV(MIN)
= 0.5V • 0.985• 1+8•
0.99
1.01
= 4.354V
and
V
UV(MAX)
= 0.5V •1.015• 1+8•
1.01
0.99
= 4.650V
Glitch Immunity
In any supervisory application, noise riding on the moni-
tored DC
voltage causes spurious resets. To solve
this
problem without adding hysteresis, which causes a new
error term in the trip voltage, the LTC2914 lowpass filters
the output of the first stage comparator at each input. This
filter integrates the output of the comparator before as
-
serting the
UV or OV logic. A transient at the input of the
comparator of
sufficient magnitude and duration triggers
the output logic. The Typical Performance Characteristics
section shows a graph of the Transient Duration vs Com
-
parator Overdrive.
UV/OV Timing
The
LTC2914 has an adjustable timeout period (t
UOTO
) that
holds OV or UV asserted after all faults have cleared. This
assures a minimum reset pulse width allowing a settling
time delay for the monitored voltage after it has entered
the valid region of operation.
When any VH input drops below its designed threshold,
the UV pin asserts low. When all inputs recover above
their designed thresholds, the UV output timer starts. If
all inputs remain above their designed thresholds when
the timer finishes, the UV pin weakly pulls high. However,
if any input
falls below its designed threshold during this
time-out period,
the timer resets and restarts when all
inputs are above the designed thresholds. The OV output
behaves as the UV output when LATCH is high (LTC2914-1).
Selecting the UV/OV Timing Capacitor
The UV and OV timeout period (t
UOTO
) for the LTC2914
is adjustable to accommodate a variety of applications.
Connecting a capacitor, C
TMR
, between the TMR pin and
ground sets the timeout period. The value of capacitor
needed for a particular timeout period is:
C
TMR
= t
UOTO
• 115 • 10
–9
(F/s)
The Reset Timeout Period vs Capacitance graph found in
the Typical Performance Characteristics shows the desired
delay time as a function of the value of the timer capacitor
that must be used. The TMR pin must have a minimum of
10pF or be tied to V
CC
. For long timeout periods, the only
limitation is the availability of a large value capacitor with
applicaTions inForMaTion
