Low Power JFET-Input Op Amps
ADA4062-2/ADA4062-4
Rev. B
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FEATURES
Low input bias current: 50 pA maximum
Offset voltage
1.5 mV maximum for B grade (ADA4062-2 SOIC package)
2.5 mV maximum for A grade
Offset voltage drift: 5 μV/°C typical
Slew rate: 3.3 V/μs typical
CMRR: 90 dB typical
Low supply current: 165 μA typical
High input impedance
Unity-gain stable
±5 V to ±15 V dual-supply operation
Packaging
8-lead SOIC, 8-lead MSOP, 10-lead LFCSP, 14-lead TSSOP, and
16-lead LFCSP packages
APPLICATIONS
Power controls and monitoring
Active filters
Industrial/process controls
Body probe electronics
Data acquisition
Integrators
Input buffering
GENERAL DESCRIPTION
The ADA4062-2 and ADA4062-4 are dual and quad JFET-input
amplifiers with industry-leading performance. They offer lower
power, offset voltage, drift, and ultralow bias current. The
ADA4062-2 B grade (SOIC package) features a typical low offset
voltage of 0.5 mV, an offset drift of 5 μV/°C, and a bias current
of 2 pA.
The ADA4062 family is ideal for various applications, including
process controls, industrial and instrumentation equipment,
active filtering, data conversion, buffering, and power control
and monitoring. With a low supply current of 165 μA per
amplifier, they are well suited for lower power applications.
The ADA4062 family is also specified for the extended industrial
temperature range of −40°C to +125°C. The ADA4062-2 is
available in lead-free, 8-lead SOIC, 8-lead MSOP, and 10-lead
LFCSP (1.6 mm × 1.3 mm × 0.55 mm) packages, while the
ADA4062-4 is available in lead-free, 14-lead TSSOP and
16-lead LFCSP packages.
PIN CONFIGURATIONS
OUT A
1
–IN A
2
+IN A
3
V–
4
V+
8
OUT B
7
–IN B
6
+IN B
5
ADA4062-2
TOP VIEW
(Not to Scale)
07670-001
Figure 1. 8-Lead Narrow-Body SOIC and 8-Lead MSOP
7
8
3
2
5
6
4
NC
+IN B
V–
–I
N A
+IN A
OUT B
–IN B
N
C = NO CONNECT
07670-065
10
9
1
NC
V+
OUT
A
TOP VIEW
(Not to Scale)
ADA4062-2
Figure 2. 10-Lead LFCSP
ADA4062-4
1
2
3
4
5
6
7
–IN A
+IN A
V+
OUT B
–IN B
+IN B
OUT A
14
13
12
11
10
9
8
–IN D
+IN D
V–
OUT C
–IN C
+IN C
OUT D
TOP VIEW
(Not to Scale)
07670-064
Figure 3. 14-Lead TSSOP
07670-068
NOTES
1. NC = NO CONNECT.
2
. IT IS RECOMMENDED TO CONNECT THE EXPOSED PAD TO V–.
ADA4062-4
TOP VIEW
(Not to Scale)
–IN A
+IN A
V+
+IN B
–IN D
+IN D
V–
+IN C
–IN B
OUT B
OUT C
–IN C
NC
OUT A
OUT D
NC
12
11
10
1
3
4
9
2
6
5
7
8
16
15
14
13
Figure 4. 16-Lead LFCSP
Table 1. Low Power Op Amps
Precision
CMOS
Precision
High Bandwidth
High
Bandwidth
Single AD8663 AD8641
Dual AD8667 AD8642 AD8682
Quad AD8669 AD8643 AD8684
ADA4062-2/ADA4062-4
Rev. B | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
Power Sequencing ........................................................................ 5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Applications Information .............................................................. 15
Notch Filter ................................................................................. 15
High-Side Signal Conditioning ................................................ 15
Micropower Instrumentation Amplifier ................................. 15
Phase Reversal ............................................................................ 16
Schematic ......................................................................................... 17
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 20
REVISION HISTORY
2/10—Rev. A to Rev. B
Added 16-Lead LFCSP Package........................................ Universal
Changes to Features Section, General Description Section, and
Table 1 ................................................................................................ 1
Changes to Offset Voltage Drift Parameter, Table 2 .................... 3
Changes to Table 4 ............................................................................ 5
Changes to Typical Performance Characteristics Layout ............ 6
Added Figure 6 and Figure 9; Renumbered Sequentially ........... 6
Changes to Figure 7, Figure 8, and Figure 10 ............................... 6
Changes to Figure 25 and Figure 28 ............................................... 9
Changes to Figure 37 and Figure 40 ............................................. 11
Changes to Figure 41 to Figure 46 ................................................ 12
Changes to Figure 47 and Figure 50 ............................................. 13
Changes to Figure 53 to Figure 58 ................................................ 14
Changes to Notch Filter Section and Micropower Instrumentation
Amplifier Section ............................................................................ 15
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 20
7/09—Rev. 0 to Rev. A
Added ADA4062-4 ............................................................. Universal
Added 14-Lead TSSOP Package ....................................... Universal
Added 10-Lead LFCSP Package ....................................... Universal
Changes to Features Section and Table 1 ....................................... 1
Changes to Table 2 ............................................................................. 3
Changes to Thermal Resistance Section ........................................ 5
Changes to Figure 5, Figure 6, Figure 8, and Figure 9 .................. 6
Changes to Figure 37 and Figure 40............................................. 11
Changes to Figure 41 and Figure 44............................................. 12
Changes to Figure 47, Figure 48, Figure 50, and Figure 51....... 13
Added Figure 49 and Figure 52; Renumbered Sequentially ..... 13
Changes to Figure 57 and Figure 59............................................. 15
Changes to Phase Reversal Section and Figure 61 ..................... 16
Changes to Figure 63 ...................................................................... 17
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 19
10/08—Revision 0: Initial Version
ADA4062-2/ADA4062-4
Rev. B | Page 3 of 20
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
V
SY
= ±15 V, V
CM
= 0 V, T
A
= 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage V
OS
B Grade (ADA4062-2, 8-Lead SOIC Only) 0.5 1.5 mV
−40°C T
A
≤ +125°C 3 mV
A Grade 0.75 2.5 mV
−40°C T
A
≤ +125°C 5 mV
Offset Voltage Drift ∆V
OS
/∆T −40°C T
A
≤ +125°C 5 μV/°C
Input Bias Current I
B
2 50 pA
−40°C T
A
≤ +125°C 5 nA
Input Offset Current I
OS
0.5 25 pA
−40°C T
A
≤ +125°C 2.5 nA
Input Voltage Range −40°C ≤ T
A
≤ +125°C −11.5 +15 V
Common-Mode Rejection Ratio CMRR
B Grade (ADA4062-2, 8-Lead SOIC Only) V
CM
= −11.5 V to +11.5 V 80 90 dB
−40°C T
A
≤ +125°C 80 dB
A Grade V
CM
= −11.5 V to +11.5 V 73 90 dB
−40°C T
A
≤ +125°C 70 dB
Large-Signal Voltage Gain A
VO
R
L
= 10 kΩ, V
O
= −10 V to +10 V 76 83 dB
−40°C T
A
≤ +125°C 72 dB
Input Resistance R
IN
10
Input Capacitance, Differential Mode C
INDM
1.5 pF
Input Capacitance, Common Mode C
INCM
4.8 pF
OUTPUT CHARACTERISTICS
Output Voltage High V
OH
R
L
= 10 kΩ to V
CM
13 13.5 V
−40°C T
A
≤ +125°C 12.5 V
Output Voltage Low V
OL
R
L
= 10 kΩ to V
CM
−13.8 −13 V
−40°C T
A
≤ +125°C −12.5 V
Short-Circuit Current I
SC
20 mA
Closed-Loop Output Impedance Z
OUT
f = 1 kHz, A
V
= 1 1 Ω
POWER SUPPLY
Power Supply Rejection Ratio PSRR
B Grade (ADA4062-2, 8-Lead SOIC Only) V
SY
= ±4 V to ±18 V 80 90 dB
−40°C T
A
≤ +125°C 80 dB
A Grade V
SY
= ±4 V to ±18 V 74 90 dB
−40°C T
A
≤ +125°C 70 dB
Supply Current per Amplifier I
SY
I
O
= 0 mA 165 220 μA
−40°C T
A
≤ +125°C 260 μA
DYNAMIC PERFORMANCE
Slew Rate SR R
L
= 10 kΩ, C
L
= 100 pF, A
V
= 1 3.3 V/μs
Settling Time t
S
To 0.1%, V
IN
= 10 V step, C
L
= 100 pF,
R
L
= 10 kΩ, A
V
= 1
3.5 μs
Gain Bandwidth Product GBP R
L
= 10 kΩ, A
V
= 1 1.4 MHz
Phase Margin Φ
M
R
L
= 10 kΩ, A
V
= 1 78 Degrees
Channel Separation (ADA4062-2 Only) CS f = 1 kHz 135 dB
Channel Separation (ADA4062-4 Only) CS f = 1 kHz 130 dB

ADA4062-4ACPZ-R2

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Operational Amplifiers - Op Amps Quad Low Power JFET-Input
Lifecycle:
New from this manufacturer.
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