ADA4062-2/ADA4062-4
Rev. B | Page 16 of 20
PHASE REVERSAL
Phase reversal occurs in some amplifiers when the input common-
mode voltage range is exceeded. When the voltage driving the
input to these amplifiers exceeds the maximum input common-
mode voltage range, the output of the amplifiers changes polarity.
Most JFET input amplifiers have phase reversal if either input
exceeds the input common-mode range.
For the ADA4062-x, the output does not phase reverse if one
or both of the inputs exceeds the input voltage range but remains
within the positive supply rail and 0.5 V above the negative
supply rail. In other words, for an application with a supply
voltage of ±15 V, the input voltage can be as high as +15 V
without any output phase reversal. However, when the voltage
of the inputs is driven beyond −14.5 V, phase reversal occurs
due to saturation of the input stage leading to forward biasing
of the gate-drain diode. Phase reversal in ADA4062-x can be
prevented by using a Schottky diode to clamp the input terminals
to each other. In the simple buffer circuit in Figure 63, D1
protects the op amp against phase reversal, and R limits the
input current that flows into the op amp.
+V
SY
–V
SY
V
O
07670-053
R
10k
ADA4062-x
D1
IN5711
Figure 63. Phase Reversal Solution Circuit
07670-063
TIME (40µs/DIV)
VOL
AGE (5V/DIV)
V
SY
= ±15V
V
OUT
V
IN
Figure 64. No Phase Reversal
