17
2321H–CNFG–03/06
AT17LV65/128/256/512/010/002/040
Figure 21-1. Ordering Code
Package Type
8CN4 8-lead, 6 mm x 6 mm x 1 mm, Leadless Array Package (LAP) – Pin-compatible with 8-lead SOIC/VOID Packages
8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
20J 20-lead, Plastic J-leaded Chip Carrier (PLCC)
20S2 20-lead, 0.300" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
44A 44-lead, Thin (1.0 mm) Plastic Quad Flat Package Carrier (TQFP)
44J 44-lead, Plastic J-leaded Chip Carrier (PLCC)
Vo l t a g e Size (Bits) Special Pinouts Package Te m pe rat u re
65 = 65K A = Altera 8CN4 C = Commercial
128 = 128K Blank = Xilinx/Atmel/ = 8P3 I = Industrial
256 = 256K = 8S1
512 = 512K = 20J
010 = 1M
= 44A
002 = 2M
= 44J
040 = 4M
AT17LV65A-10PC
C
P
N
J
S
TQ
BJ
=
3.0V to 5.5V
Other
= 20S2
U = Fully Green
