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LTC1266CS-3.3#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
4
LTC1266
LTC1266 -3.3/LTC1266 -5
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
Q1
V
IN
Pin DC Supply Current (Note 3)
Normal Mode 3.5V < V
IN
< 18V 2.1 3.3 mA
Sleep Mode 3.5V < V
IN
< 18V 170 260 µA
Shutdown V
SHUTDOWN
= 2.1V, 3.5V < V
IN
< 18V 25 60 µA
I
Q2
PWR V
IN
DC Supply Current (Note 3)
Normal Mode 3.5V < PWR V
IN
< 18V 20 50 µA
Sleep Mode 3.5V < PWR V
IN
< 18V 1 7 µA
Shutdown V
SHUTDOWN
= 2.1V, 3.5V < PWR V
IN
< 18V 1 7 µA
V
SENSE1
Current Sense Threshold V
BINH
= 0V
(Burst Mode Operation Enabled)
LTC1266CS, LTC1266IS V
SENSE
–
= 3.3V, V
FB
= V
OUT
/2.64 + 25mV (Forced) 25 mV
LTC1266CS V
SENSE
–
= 3.3V, V
FB
= V
OUT
/2.64 – 25mV (Forced) 135 155 180 mV
LTC1266IS V
SENSE
–
= 3.3V, V
FB
= V
OUT
/2.64 – 25mV (Forced) 135 155 190 mV
LTC1266-3.3, LTC1266-5 (I and C) V
SENSE
–
= V
OUT
+ 100mV (Forced) 25 mV
LTC1266CS-3.3, LTC1266CS-5 V
SENSE
–
= V
OUT
– 100mV (Forced) 135 155 180 mV
LTC1266IS-3.3, LTC1266IS-5 V
SENSE
–
= V
OUT
– 100mV (Forced) 135 155 190 mV
V
SENSE2
Current Sense Threshold V
BINH
= 2.1V
(Burst Mode Operation Disabled)
LTC1266CS, LTC1266IS V
SENSE
–
3.3V, V
FB
= V
OUT
/2.64 + 25mV (Forced) –20 mV
LTC1266CS V
SENSE
–
3.3V, V
FB
= V
OUT
/2.64 – 25mV (Forced) 130 155 185 mV
LTC1266IS V
SENSE
–
3.3V, V
FB
= V
OUT
/2.64 – 25mV (Forced) 130 155 195 mV
LTC1266-3.3, LTC1266-5 (I and C) V
SENSE
–
= V
OUT
+ 100mV (Forced) –20 mV
LTC1266CS-3.3, LTC1266CS-5 V
SENSE
–
= V
OUT
– 100mV (Forced) 130 155 185 mV
LTC1266IS-3.3, LTC1266IS-5 V
SENSE
–
= V
OUT
– 100mV (Forced) 130 155 195 mV
V
SHDN
Shutdown Pin Threshold C Grade 0.55 0.8 2 V
I Grade 0.50 0.8 2 V
t
OFF
Off-Time (Note 4) C
T
= 390pF, I
LOAD
= 700mA, C Grade 3.8 5 6.5 µs
C
T
= 390pF, I
LOAD
= 700mA, I Grade 3.8 5 7.0 µs
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
T
J
= T
A
+ (P
D
× 110°C/W)
Note 3: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 4: In applications where R
SENSE
is placed at ground potential, the off-
time increases approximately 40%.
Note 5: The LTC1266CS, LTC1266CS-3.3, LTC1266-5 and LTC1266ACS
are not tested and not quality assurance sampled at –40°C and 85°C.
These specifications are guaranteed by design and/or correlation. The
LTC1266IS, LTC1266IS-3.3, LTC1266IS-5 and LTC1266AIS are
guaranteed and tested over the –40°C to 85°C operating temperature
range.
Note 6: Unless otherwise noted the specifications for the LTC1266A are
the same as those for the LTC1266.
Note 7: t
r
and t
f
are measured at 10% and 90% levels.
–40°C < T
A
< 85°C (Note 5), V
IN
= 10V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
5
LTC1266
LTC1266-3.3/LTC1266-5
INPUT VOLTAGE (V)
0
EFFICIENCY (%)
85
90
95
100
16
1266 G04
80
75
70
4
8
12
20
FIGURE 11 CIRCUIT
I
LOAD
= 2.5A
I
LOAD
= 100mA
I
LOAD
= 1A
LOAD CURRENT (A)
0
–40
∆V
OUT
(mV)
–30
–20
–10
30
10
0.5
1.0
20
0
1.5
2.0 2.5
3.0
1266 G06
FIGURE 11 CIRCUIT
V
IN
= 12V (Burst Mode
OPERATION ENABLED)
V
IN
= 5V
V
IN
= 5V (Burst Mode
OPERATION INHIBITED)
INPUT VOLTAGE (V)
0
SUPPLY CURRENT (mA)
1.5
2.0
2.5
3.0
16
1266 G07
1.0
0.5
0
4
8
12
20
ACTIVE MODE
SLEEP MODE
INPUT VOLTAGE (V)
0
SUPPLY CURRENT (µA)
15
20
25
16
1266 G08
10
5
0
4
8
12
20
ACTIVE MODE
SLEEP MODE
INPUT VOLTAGE (V)
0
SUPPLY CURRENT (µA)
30
40
50
1266 G09
20
10
0
5
10
15
20
PWR V
IN
V
IN
INPUT VOLTAGE (V)
0
∆V
OUT
(mV)
0
10
20
16
1266 G05
–10
–20
4
812
–30
40
30
–40
FIGURE 11 CIRCUIT
I
LOAD
= 1A
Efficiency vs Input Voltage
V
IN
DC Supply Current
Line Regulation
Power V
IN
DC Supply Current
Load Regulation
Supply Current in Shutdown
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Efficiency vs Input Voltage
LOAD CURRENT (A)
0
–50
∆V
OUT
(mV)
–40
–30
–20
20
0
1
2
10
–10
3
4
5
1266 G03
V
IN
= 5V
FIGURE 1 CIRCUIT
V
IN
= 9V (Burst Mode
OPERATION ENABLED)
V
IN
= 5V (Burst Mode
OPERATION INHIBITED)
Line Regulation Load Regulation
INPUT VOLTAGE (V)
3
70
EFFICIENCY (%)
75
80
85
90
100
4
567
1266 G01
89
95
I
LOAD
= 2.5A
FIGURE 1 CIRCUIT
I
LOAD
= 5A
I
LOAD
= 100mA
INPUT VOLTAGE (V)
3
∆V
OUT
(mV)
0
10
20
9
1266 G02
–10
–20
–40
45678
–30
40
30
FIGURE 1 CIRCUIT
I
LOAD
= 1A
6
LTC1266
LTC1266 -3.3/LTC1266 -5
TDRIVE (Pin 1): High Current Drive for Topside MOSFET.
This MOSFET can be either P-channel or N-channel, user
selectable by Pin 3. Voltage swing at this pin is from PWR
V
IN
to ground.
PWR V
IN
(Pin 2): Power Suppy for Drive Signals. Must be
closely decoupled to power ground (Pin 15).
PINV (Pin 3): Phase Invert. Sets the phase of the topside
driver to drive either a P-channel or an N-channel MOSFET
as follows:
P-channel: Pin 3 = 0V
N-channel: Pin 3 = PWR V
IN
BINH (Pin 4): Burst Mode Operation Inhibit. A CMOS logic
high on this pin will disable the Burst Mode operation
feature forcing continuous operation down to zero load.
V
IN
(Pin 5): Main Supply Pin.
C
T
(Pin 6): External Capacitor. C
T
from Pin 4 to ground sets
the operating frequency. The actual frequency is also
dependent on the input voltage.
I
TH
(Pin 7): Gain Amplifier Decoupling Point. The current
comparator threshold increases with the Pin 7 voltage.
SENSE
–
(Pin 8): Connects to internal resistive divider
which sets the output voltage in LTC1266-3.3 and
LTC1266-5 versions. Pin 8 is also the (–) input for the
current comparator.
SENSE
+
(Pin 9): The (+) Input to the Current Comparator.
A built-in offset between Pins 8 and 9 in conjunction with
R
SENSE
sets the current trip threshold.
V
FB
(Pin 10): For the LTC1266 adjustable version, Pin 10
serves as the feedback pin from an external resistive
divider used to set the output voltage. On LTC1266-3.3
and LTC1266-5 versions this pin is not used.
SHDN (Pin 11): When grounded, the LTC1266 series
operates normally. Pulling Pin 11 high holds both
MOSFETs off and puts the LTC1266 in micropower shut-
down mode. Requires CMOS logic signal with t
r
, t
f
< 1µs.
Should not be left floating.
SGND (Pin 12): Small-Signal Ground. Must be routed
separately from other grounds to the (–) terminal of C
OUT
.
LB
IN
(Pin 13): Input to the Low-Battery Comparator. This
input is compared to an internal 1.25V reference.
LB
OUT
(Pin 14): Open Drain Output of the Low-Battery
Comparator. This pin will sink current when Pin 13 is
below 1.25V.
PGND (Pin 15): Driver Power Ground. Connects to source
of N-channel MOSFET and the (–) terminal of C
IN
.
BDRIVE (Pin 16): High Current Drive for Bottom
N-Channel MOSFET. Voltage swing at Pin 16 is from
ground to PWR V
IN
.
UU
U
PI FU CTIO S
OUTPUT VOLTAGE (V)
01
OFF-TIME (µs)
40
60
5
1266 G10
20
0
2
34
100
80
LTC1266-3.3
LTC1266-5
V
SENSE
–
= V
OUT
(V
IN
– V
OUT
) VOLTAGE (V)
0
NORMALIZED FREQUENCY
2.5
3.0
12108
1266 G11
0.5
1.5
2.0
1.0
0
2
4
6
14
16
V
OUT
= 3.3V
0°C
70°C
25°C
TEMPERATURE (°C)
0
SENSE VOLTAGE (mV)
100
150
200
80
1266 G12
50
0
–50
20
40
60
100
MAX THRESHOLD
MIN THRESHOLD (Burst Mode
OPERATION INHIBIT)
MIN THRESHOLD (Burst Mode
OPERATION ENABLED)
Off-Time vs Output Voltage
Operating Frequency
vs (V
IN
– V
OUT
) Voltage Current Sense Threshold Voltage
TYPICAL PERFOR A CE CHARACTERISTICS
UW
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

LTC1266CS-3.3#TRPBF

Mfr. #:
Buy LTC1266CS-3.3#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Syn Switching Reg Controller
Lifecycle:
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