HVLED805 Datasheet HVLED805TR, HVLED805 | P22-P24

Application information HVLED805

22/29 Doc ID 18077 Rev 1

This offset is proportional to V

and is used to compensate the current overshoot,

according to the formula:

Equation 13

Finally, the R

dmg

resistor can be calculated as follows:

Equation 14

In this case the peak drain current does not depend on input voltage anymore.

One more consideration concerns the R

dmg

value: during MOSFET’s ON-time, the current

sourced by the DMG pin, I

DMG

, is compared with an internal reference current I

DMGON

(-50

µA typical).

If I

DMG

< I

DMGON

, the brownout function is activated and the IC is shut-down.

This feature is especially important when the auxiliary winding is accidentally disconnected

and considerably increases the end-product’s safety and reliability.

5.7 Burst-mode operation at no load or very light load

When the voltage at the COMP pin falls 65 mV below a threshold fixed internally at a value,

COMPBM

, the IC is disabled with the MOSFET kept in OFF state and its consumption

reduced at a lower value to minimize Vcc capacitor discharge.

In this condition the converter operates in burst-mode (one pulse train every T

START

=500

µs), with minimum energy transfer.

As a result of the energy delivery stop, the output voltage decreases: after 500 µs the

controller switches-on the MOSFET again and the sampled voltage on the DMG pin is

compared with the internal reference. If the voltage on the EA output, as a result of the

comparison, exceeds the V

COMPL

threshold, the device restarts switching, otherwise it stays

OFF for another 500 µs period.

In this way the converter will work in burst-mode with a nearly constant peak current defined

by the internal disable level. A load decrease will then cause a frequency reduction, which

can go down even to few hundred hertz, thus minimizing all frequency-related losses and

making it easier to comply with energy saving regulations. This kind of operation, shown in

the timing diagrams of

Figure 19 along with the others previously described, is noise-free

since the peak current is low

dmg

FFIN

SENSE

dIN

⋅

=⋅

⋅

SENSEd

FFp

PRI

AUX

dmg

⋅

⋅=

HVLED805 Application information

Doc ID 18077 Rev 1 23/29

5.8 Soft-start and starter block

The soft start feature is automatically implemented by the constant current block, as the

primary peak current will be limited from the voltage on the C

LED

capacitor.

During start-up, as the output voltage is zero, the IC will start in CC mode with no high peak

current operations. In this way the voltage on the output capacitor will increase slowly and

the soft-start feature will be ensured.

Actually the C

LED

value is not important to define the soft-start time, as its duration depends

on others circuit parameters, like transformer ratio, sense resistor, output capacitors and

load. The user will define the best appropriate value by experiments.

5.9 Hiccup mode OCP

The device is also protected against short circuit of the secondary rectifier, short circuit on

the secondary winding or a hard-saturated flyback transformer. A comparator monitors

continuously the voltage on the R

SENSE

and activates a protection circuitry if this voltage

exceeds 1 V.

To distinguish an actual malfunction from a disturbance (e.g. induced during ESD tests), the

first time the comparator is tripped the protection circuit enters a “warning state”. If in the

subsequent switching cycle the comparator is not tripped, a temporary disturbance is

assumed and the protection logic will be reset in its idle state; if the comparator will be

tripped again a real malfunction is assumed and the device will be stopped.

This condition is latched as long as the device is supplied. While it is disabled, however, no

energy is coming from the self-supply circuit; hence the voltage on the V

capacitor will

decay and cross the UVLO threshold after some time, which clears the latch. The internal

start-up generator is still off, then the V

voltage still needs to go below its restart voltage

Figure 18. Load-dependent operating modes: timing diagrams

COMP

65 mV

hyster.

Normal-modeBurst-modeNormal-mode

TSTART TSTART TSTART TSTART

COMPL

Application information HVLED805

24/29 Doc ID 18077 Rev 1

before the V

capacitor is charged again and the device restarted. Ultimately, this will

result in a low-frequency intermittent operation (Hiccup-mode operation), with very low

stress on the power circuit. This special condition is illustrated in the timing diagram of

Figure 18.

5.10 Layout recommendations

A proper printed circuit board layout is essential for correct operation of any switch-mode

converter and this is true for the HVLED805 as well. Careful component placing, correct

traces routing, appropriate traces widths and compliance with isolation distances are the

major issues. In particular:

● The compensation network should be connected as close as possible to the COMP

pin, maintaining the trace for the GND as short as possible

● Signal ground should be routed separately from power ground, as well from the sense

resistor trace.

Figure 19. Hiccup-mode OCP: timing diagram

VDS

VccON

VccOFF

Vccrest

Secondary diode is shorted here

VSOURC E

1 V

Two switching cycles

VCC

Vcsdis

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HVLED805

Mfr. #:

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