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TSI721A1-16GIL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66
Tsi721 Datasheet 28 April 4, 2016
Integrated Device Technology
3.2 Recommended Operating Conditions
3.3 Power Consumption
Table 13 lists the current draw for each supply group for different environmental conditions. Test characteristics were are
follows:
• RapidIO and PCIe links configured at operated at 5 Gbps in x4 mode
• Traffic passed through the Tsi721 with a high incidence of 0/1 toggling
• Power measurements are based on worst case fast silicon processing. A “Total Power” reduction in excess of 5% can be
expected for nominal/typical silicon.
Table 12: Recommended Operating Conditions
a
a. Exposure to conditions outside the recommended operating conditions can affect the operation and/or reliability of the device.
Symbol Parameter Minimum Maximum Units
T
A
Ambient temperature – Commercial 0 70 C
Ambient temperature – Industrial -40 85
C
T
JN
Junction temperature - 110 C
VDDIO 3.3V LVTTL I/O supply voltage 3.14 3.47 V
2.5V LVTTL I/O supply voltage 2.4 2.6 V
VDD 1.0V Core supply voltage 0.95 1.05 V
AVDD10 1.0V SerDes analog supply voltage 0.95 1.05 V
AVDD25 2.5V SerDes analog supply voltage 2.25 2.75 V
AVTT 1.5V SerDes transmitter analog supply voltage 1.4 1.7 V
Table 13: Power Consumption
Junction
Temp
(
0
C)
Voltage
VDD AVDD10 AVDD25 AVTT VDDIO
Total
Power (W)
Voltage
(V)
Current
[mA]
Voltage
(V)
Current
[mA]
Voltage
(V)
Current
[mA]
Voltage
(V)
Current
[mA]
Voltage
(V)
Current
[mA]
125 Max. 1.05 3000 1.05 330 2.75 165 1.70 350 3.47 20 4.61
Typ. 1.00 2722 1.00 281 2.50 153 1.50 335 3.30 18 3.95
Min. 0.95 2458 0.95 242 2.25 144 1.40 320 3.14 17 3.39
25 Max. 1.05 1110 1.05 214 2.75 161 1.70 350 3.47 20 2.50
Typ. 1.00 1003 1.00 190 2.50 151 1.50 335 3.30 18 2.13
Min. 0.95 909 0.95 170 2.25 142 1.40 320 3.14 17 1.85
Tsi721 Datasheet 29 April 4, 2016
Integrated Device Technology
3.4 Power Supply Sequencing
This section contains power-up and power-down supply sequencing for the Tsi721.
3.4.1 Power-Up Sequencing
The Tsi721 must have its supplies powered up as follows:
1. VDD and AVDD10 (1.0V) must be powered up together.
To achieve this requirement AVDD10 can be supplied from the same regulator as VDD, but must be isolated on the board
through a ferrite bead.
2. VDDIO, AVDD25, AVTT, and the 1.0V supplies (VDD and AVDD10) can be powered up in any order.
3. The voltages on any input or I/O pin cannot exceed its corresponding supply voltage during power supply ramp up.
4. The power supply ramp rates must be kept between 10 V/s and 0.5x10E6 V/s to minimize power current spikes during power
up. This leads to the ramp times specified in the following table.
3.4.2 Power-Down Sequencing
The Tsi721 must have its supplies powered down as follows:
1. VDD and AVDD10 (1.0V) must be powered down together. To achieve this requirement AVDD10 can be supplied from the
same regulator as VDD, but must be isolated on the board through a ferrite bead.
2. VDDIO, AVDD25, AVTT, and the 1.0V supplies (VDD and AVDD10) can be powered down in any order.
-40 Max. 1.05 829 1.05 192 2.75 159 1.70 350 3.47 20 2.17
Typ. 1.00 765 1.00 175 2.50 149 1.50 335 3.30 18 1.87
Min. 0.95 707 0.95 159 2.25 141 1.40 320 3.14 17 1.64
Table 14: Power Supply Sequencing Ramp Times
V
V/s
10 5.00E+05
3.3 330000 us 6.6 us
2.5 250000 us 5 us
1.5 150000 us 3 us
1 100000 us 2 us
Table 13: Power Consumption (Continued)
Junction
Temp
(
0
C)
Voltage
VDD AVDD10 AVDD25 AVTT VDDIO
Total
Power (W)
Voltage
(V)
Current
[mA]
Voltage
(V)
Current
[mA]
Voltage
(V)
Current
[mA]
Voltage
(V)
Current
[mA]
Voltage
(V)
Current
[mA]
Tsi721 Datasheet 30 April 4, 2016
Integrated Device Technology
3.5 DC Operating Characteristics
The following table lists the DC operating characteristics for 3.3V LVTTL of the Tsi721.
The following table lists the DC operating characteristics for 2.5V LVTTL of the Tsi721.
Table 15: 3.3V LVTTL DC Operating Characteristics at Recommended Operating Condition of 3.3V
Symbol Parameter Minimum Maximum Units
V
IH
LVTTL input high voltage 2.0 3.6 V
V
IL
LVTTL input low voltage -0.3 0.8 V
V
OH
LVTTL output high voltage 2.4 - V
V
OL
LVTTL output low voltage - 0.4 V
R pull-up Resistor pull-up 26K 64K Ohm
R pull-down Resistor pull-down 29K 79K Ohm
C
PAD
LVTTL pad capacitance - 4 pF
Table 16: 2.5V LVTTL DC Operating Characteristics at Recommended Operating Condition of 2.5V
Symbol Parameter Minimum Maximum Units
V
IH
LVTTL input high voltage 1.7 3.6 V
V
IL
LVTTL input low voltage -0.3 0.7 V
V
OH
LVTTL output high voltage 1.7 - V
V
OL
LVTTL output low voltage - 0.7 V
R pull-up Resistor pull-up 33K 93K Ohm
R pull-down Resistor pull-down 34K 108K Ohm
C
PAD
LVTTL pad capacitance - 4 pF
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66

TSI721A1-16GIL

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Buy TSI721A1-16GIL
Manufacturer:
IDT
Description:
PCI Interface IC PCIe to RapidIO
Lifecycle:
New from this manufacturer.
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