Tsi721 Datasheet 64 April 4, 2016
Integrated Device Technology
4.3 Thermal Characteristics
Heat generated by the packaged silicon must be removed from the package to ensure the silicon is maintained within its
functional and maximum design temperature limits. If heat buildup becomes excessive, the silicon temperature may exceed
the temperature limits. A consequence of this is that the silicon may fail to meet the performance specifications and the
reliability objectives may be affected.
Failure mechanisms and failure rate of a device has an exponential dependence on the silicon operating temperatures.
Therefore, the control of the package, and by extension the junction temperature, is essential to ensure product reliability. The
Tsi721 is specified safe for operation when the junction temperature is within the recommended limits as displayed in Tabl e 12.
Table 38 shows the simulated thermal characteristic (Theta JB and Theta JC) of the Tsi721 package.
Table 39 shows the simulated junction to ambient characteristics of the Tsi721. The thermal resistance Theta JA
characteristics of a package depends on multiple variables other than just the package. In a typical application, designers must
consider various system-level and environmental characteristics, such as:
Package mounting (vertical/horizontal)
System airflow conditions (laminar/turbulent)
Heat sink design and thermal characteristics
Heat sink attachment method
PWB size, layer count, and conductor thickness
Influence of the heat dissipating components assembled on the PWB (neighboring effects)
The results in Table 39 are based on a JEDEC Thermal Test Board configuration (JESD51-9), and do not factor in the
system-level characteristics described above. As such, these values are for reference only.
4.4 Moisture Sensitivity
The moisture sensitivity level (MSL) for the Tsi721 is 4.
Table 38: Junction to Ambient Characteristics – Theta JB/JC
Interface Results (C/W)
Theta JB 8.78
Theta JC 0.11
Table 39: Junction to Ambient Characteristics – Theta JA
Device
Theta JA (C/W)
0 m/s 1 m/s 2 m/s
Tsi721 13.1 12.06 11.4
Tsi721 Datasheet 65 April 4, 2016
Integrated Device Technology
5. Ordering Information
Part Number Temperature Grade Package Type Pb (Lead) Free
Tsi721A1-16GCLY Commercial FCBGA No; RoHS Compliant (5of6)
Tsi721A1-16GCLV Commercial FCBGA Yes
Tsi721A1-16GIL Industrial FCBGA No; Leaded Balls and Bumps
Tsi721A1-16GILH Industrial FCBGA No; Leaded Balls
Tsi721A1-16GILY Industrial FCBGA No; RoHS Compliant (5of6)
Tsi721A1-16GILV Industrial FCBGA Yes
DISCLAIMER Integrated Device Technology, Inc. (IDT) reserves the right to modify the products and/or specifications described herein at any time, without notice, at IDT's sole discretion. Performance spec-
ifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same way when installed in customer products. The information
contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT's products for any particular purpose, an implied
warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of
IDT or any third parties.
IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be rea-
sonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.
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Tsi721 Datasheet 66 April 4, 2016
Integrated Device Technology

TSI721A1-16GIL

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PCI Interface IC PCIe to RapidIO
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