PCA9518A_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 3 December 2008 4 of 23
NXP Semiconductors
PCA9518A
Expandable 5-channel I
2
C-bus hub
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 3. Pin configuration for SO20 Fig 4. Pin configuration for TSSOP20
PCA9518AD
EXPSCL1 V
DD
EXPSCL2 EXPSDA2
SCL0 EXPSDA1
SDA0 EN4
SCL1 SDA4
SDA1 SCL4
EN1 EN3
SCL2 SDA3
SDA2 SCL3
V
SS
EN2
002aac528
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
PCA9518APW
002aac529
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
EXPSCL1 V
DD
EXPSCL2 EXPSDA2
SCL0 EXPSDA1
SDA0 EN4
SCL1 SDA4
SDA1 SCL4
EN1 EN3
SCL2 SDA3
SDA2 SCL3
V
SS
EN2
Table 2. Pin description
Symbol Pin Description
EXPSCL1 1 expandable serial clock pin 1
EXPSCL2 2 expandable serial clock pin 2
SCL0 3 serial clock bus 0
SDA0 4 serial data bus 0
SCL1 5 serial clock bus 1
SDA1 6 serial data bus 1
EN1 7 active HIGH bus 1 enable input
SCL2 8 serial clock bus 2
SDA2 9 serial data bus 2
V
SS
10 supply ground
EN2 11 active HIGH bus 2 enable input
SCL3 12 serial clock bus 3
SDA3 13 serial data bus 3
EN3 14 active HIGH bus 3 enable input
SCL4 15 serial clock bus 4
SDA4 16 serial data bus 4
EN4 17 active HIGH bus 4 enable input
EXPSDA1 18 expandable serial data pin 1
EXPSDA2 19 expandable serial data pin 2
V
DD
20 supply voltage
PCA9518A_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 3 December 2008 5 of 23
NXP Semiconductors
PCA9518A
Expandable 5-channel I
2
C-bus hub
6. Functional description
The PCA9518A CMOS integrated circuit is a five-way hub repeater, which enables
I
2
C-bus and similar bus systems to be expanded in increments of five with only one
repeater delay and no functional degradation of system performance.
The PCA9518A CMOS integrated circuit contains five multi-directional, open-drain buffers
specifically designed to support the standard low-level contention arbitration of the
I
2
C-bus. Except during arbitration or clock stretching, the PCA9518A acts like a pair of
non-inverting, open-drain buffers, one for SDA and one for SCL.
Refer to Figure 1 “Block diagram of PCA9518A”.
6.1 Enable
The enable pins EN1 through EN4 are active HIGH and have internal pull-up resistors.
Each enable pin ENn controls its associated SDAn and SCLn ports. When LOW, the ENn
pin blocks the inputs from SDAn and SCLn, as well as disabling the output drivers on the
SDAn and SCLn pins. The enable pins should only change state when both the global bus
and the local port are in an idle state to prevent system failures.
The active HIGH enable pins allow the use of open-drain drivers which can be wire-ORed
to create a distributed enable where either centralized control signal (master) or spoke
signal (sub-master) can enable the channel when it is idle.
Unused channels must have pull-up resistors unless their enable pin (ENn) is always
LOW. Port 0 must always have pull-up resistors since it is always present in the bus and
cannot be disabled.
6.2 Expansion
The PCA9518A includes 4 open-drain I/O pins used for expansion. Two expansion pins,
EXPSDA1 and EXPSDA2 are used to communicate the internal state of the serial data
within each hub to the other hubs. The EXPSDA1 pins of all hubs are connected together
to form an open-drain bus. Similarly, all EXPSDA2 pins, EXPSCL1 pins, and all EXPSCL2
pins are connected together forming a 4-wire bus between hubs.
When it is necessary to be able to deselect every port, each expansion device only
contributes 4 ports which can be enabled or disables because the fifth does not have an
enable pin.
Pull-up resistors are required on the EXPxxxn
3
pins even if only one PCA9518A is used.
6.3 I
2
C-bus systems
As with the standard I
2
C-bus system, pull-up resistors are required to provide the logic
HIGH levels on the buffered bus. (Standard open-collector or open-drain configuration of
the I
2
C-bus). The size of these pull-up resistors depends on the system, but each side of
the repeater must have a pull-up resistor. This part is designed to work with
Standard-mode (0 Hz to 100 kHz) and Fast-mode (0 Hz to 400 kHz) I
2
C-bus devices in
addition to SMBus devices. Standard-mode I
2
C-bus devices only specify 3 mA output
drive; this limits the termination current to 3 mA in a generic I
2
C-bus system where
3. ‘xxxn’ is SDA1, SDA2, SCL1 or SCL2. ‘xxx’ is SDA or SCL.
PCA9518A_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 3 December 2008 6 of 23
NXP Semiconductors
PCA9518A
Expandable 5-channel I
2
C-bus hub
Standard-mode devices and multiple masters are possible. Please see application note
AN255, I
2
C/SMBus Repeaters, Hubs and Expanders
for additional information on sizing
resistors.
7. Application design-in information
A typical application is shown in Figure 5. In this example, the system master is running
on a 3.3 V I
2
C-bus while the slaves are connected to a 3.3 V or 5 V bus. All buses run at
100 kHz unless slave 3, slave 4 and slave 5 are isolated from the bus. Then the master
bus and slave 1, slave 2 and slave 6 can run at 400 kHz.
Any segment of the hub can talk to any other segment of the hub. Bus masters and slaves
can be located on any segment with 400 pF load allowed on each segment.
The PCA9518A is 5 V tolerant, so it does not require any additional circuitry to translate
between the different bus voltages.
When one port of the PCA9518A is pulled LOW by a device on the I
2
C-bus, a CMOS
hysteresis type input detects the falling edge and drives the EXPxxx1 line LOW, when the
EXPxxx1 voltage is less than 0.5V
DD
, the other ports are pulled down to the V
OL
of the
PCA9518A which is typically 0.5 V.

PCA9518APW,512

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - I/O Expanders EXPNDBL 5-CH I2C HUB
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet