3
LTC1753
1753fa
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: When I
FB
is taken below GND, it will be clamped by an internal diode.
This pin can handle input currents greater than 100mA below GND without
latchup. In the positive direction, it is not clamped to V
CC
or PV
CC
.
Note 3: All currents into device pins are positive; all currents out of the
device pins are negative. All voltages are referenced to ground unless
otherwise specified.
Note 4: The Power Good and FAULT trip thresholds are tested at the 1.8V
output voltage code. The Power Good and FAULT trip thresholds are
guaranteed by design for all other output voltage codes to the same
specification.
Note 5: The LTC1753 goes into the shutdown mode if VID0 to VID4 are
floating. Due to the internal pull-up resistors, there will be an additional
0.25mA/pin if any of the VID0 to VID4 pins are pulled low.
Note 6: Supply current in normal operation is dominated by the current
needed to charge and discharge the external FET gates. This will vary with
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
G
ERR
Error Amplifier Open-Loop DC Gain (Note 7) ● 40 54 dB
g
mERR
Error Amplifier Transconductance (Note 7) ● 0.9 1.6 2.3 millimho
BW
ERR
Error Amplifier –3dB Bandwidth COMP = Open (Note 11) 400 kHz
I
IMAX
I
MAX
Sink Current V
IMAX
= V
CC
● 150 190 230 µA
I
SS
Soft-Start Source Current V
SS
= 0V, V
IMAX
= 0V, V
IFB
= V
CC
● –16 –12 –8 µA
I
SSIL
Maximum Soft-Start Sink Current V
SENSE
= V
OUT
, V
IMAX
= V
CC
, V
IFB
= 0V ● 30 60 150 µA
Under Current Limit (Notes 8, 9), V
SS
= V
CC
I
SSHIL
Soft-Start Sink Current Under Hard V
SENSE
= 0V, V
IMAX
= V
CC
, V
IFB
= 0V ● 20 45 mA
Current Limit
t
SSHIL
Hard Current Limit Hold Time V
SENSE
= 0V, V
IMAX
= 4V, V
IFB
↓ from 5V 500 µs
t
PWRGD
Power Good Response Time↑ V
SENSE
↑ from 0V to Rated V
OUT
● 0.5 1 2 ms
t
PWRBAD
Power Good Response Time↓ V
SENSE
↓ from Rated V
OUT
to 0V ● 200 500 1000 µs
t
FAULT
FAULT Response Time V
SENSE
↑ from Rated V
OUT
to V
CC
● 200 500 1000 µs
V
OTDD
Overtemperature Driver Disable OUTEN↓, VID0 to VID4 = 0 (Note 10) (Figure 3) ● 1.6 1.7 1.8 V
V
SHDN
Shutdown OUTEN↓, VID0 to VID4 = 0 (Note 10) (Figure 3) ● 0.8 V
t
r
, t
f
Driver Rise and Fall Time (Figure 4) ● 90 150 ns
t
NOL
Driver Nonoverlap Time (Figure 4) ● 30 100 ns
V
IH
VID0 to VID4 Input High Voltage ● 2V
V
IL
VID0 to VID4 Input Low Voltage ● 0.8 V
R
SENSE
SENSE Input Resistance 108 kΩ
R
VID
VID0 to VID4 Internal Pull-Up ● 10 20 kΩ
Resistance
V
OL
Digital Output Low Voltage I
SINK
= 1.6mA, Measured at PWRGD and FAULT ● 0.1 0.4 V
I
SINK
Digital Output Sink Current ● 10 mA
the LTC1753 operating frequency, supply voltage and the external FETs
used.
Note 7: The open-loop DC gain and transconductance from the SENSE pin to
COMP pin will be (G
ERR
)(1.26/3.3) and (g
mERR
)(1.26/3.3) respectively.
Note 8: The current limiting amplifier can sink but cannot source current.
Under normal (not current limited) operation, the output current will be zero.
Note 9: Under typical soft current limit, the net soft-start discharge current
will be 60µA (I
SSIL
) + [–12µA(I
SS
)] ≅ 48µA. The soft-start sink-to-source
current ratio is designed to be 5:1.
Note 10: When VID0 to VID4 are all HIGH, the LTC1753 will be forced to
shut down internally. The OUTEN trip voltages are guaranteed by design for
all other input codes.
Note 11: This parameter is guaranteed by design and correlation and is not
tested in production.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
CC
= 5V, PV
CC
= 12V, unless otherwise noted. (Note 3)
