Power Management
The DS5003 monitors V
CC
to provide power-fail reset,
early warning power-fail interrupt, and switchover to
lithium backup. It uses an internal bandgap reference
in determining the switch points. These are called
V
PFW
, V
CCMIN
, and V
LI
, respectively. When V
CC
drops
below V
PFW
, the DS5003 performs an interrupt and
vectors to location 2Bh if the power-fail warning was
enabled. Full processor operation continues regard-
less. When power falls further to V
CCMIN
, the DS5003
invokes a reset state. No further code execution is per-
formed unless power rises back above V
CCMIN
. All
decoded chip enables and the R/W signal go to an
inactive (logic 1) state. V
CC
is still the power source at
this time. When V
CC
drops further to below V
LI
, internal
circuitry switches to the lithium cell for power. The
majority of internal circuits are disabled and the remain-
ing nonvolatile states are retained. Any devices con-
nected to V
CCO
are powered by the lithium cell at this
time. V
CCO
is at the lithium battery voltage minus
approximately 0.45V (less a diode drop), depending on
the load. Low-power SRAMs should be used for this
reason. When using the DS5003, the user must select
the appropriate battery to match the SRAM data-reten-
tion current and the desired backup lifetime. Note that
the lithium cell is only loaded when V
CC
< V
LI
. The
Secure Microcontroller User’s Guide
has more informa-
tion on this topic. The trip points V
CCMIN
and V
PFW
are
listed in the electrical specifications.
DS5003
Secure Microprocessor Chip
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