NCV7608
www.onsemi.com
14
DETAILED OPERATING DESCRIPTION
Normal Operation
Power Outputs
The NCV7608 provides eight independent power
transistors with pins D1−D8, and S1−S8 as drain and source
outputs respectively. For High−side Drive configurations
(sourcing), the drain pins are connected to the battery supply.
In Low−Side configurations (sinking), the drain pins are
connected to the load. All outputs may be configured as
high−side, low−side, half−bridge, or H−bridge. Internal
clamping structures are provided to limit transient voltages
when switching inductive loads.
SPI−Interface
The device provides a 16 bit SPI−interface. Data is
imported into the NCV7608 through the SI (serial input) pin.
Data is exported out of the NCV7608 through the SO (serial
output) pin. The input−frame (SI) is used to command the
output stages and program individual channel open load
diagnostics. The response frame (SO) provides
channel−specific (1bit / channel) status information and
fault information. See Table 1 for channel status decoding.
Words should be composed of 16 bits LSB (least significant
bit) transmitted first.
Figure 23. SPI Frame
CSB
SI
SCLK
SO
OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OL1 OL2 OL3 OL4 OL5 OL6 OL7 OL8
TW OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8
IN5
State
IN6
State
IN7
State
IN8
State
N/A N/A
VS
PSM
TW
CSB
SI
SCLK
SO
OL7 OL8
N/A
VS
PSM
OUT1
Figure 24. SPI Frame Detail
