IRMCF311
25
7.9.2 SPI Read AC Timing
P1
.3
/SYNC/SCK
SCL
/
S
O
-
S
I
T
SPICLK
t
RDSU
t
CSHOLD
SDA/CS0
P
3.
0
/INT
2
/CS
1
t
CSHIGH
Bit7
(MSB
)
Bit0(LSB)
t
SPICLKHT
t
SPICLKLT
t
CSRD
t
RDHOLD
Unless specified, Ta = 25˚C.
Symbol
Parameter
Min
Typ
Max
Unit
T
SPICLK
SPI clock period
4
-
-
SYSCLK
t
SPICLKHT
SPI clock high time
-
1/2
-
T
SPICLK
t
SPICLKLT
SPI clock low time
-
1/2
-
T
SPICLK
t
CSRD
CS to data delay time
-
-
10
nsec
t
RDSU
SPI read data setup time
10
-
-
nsec
t
RDHOLD
SPI read data hold time
10
-
-
nsec
t
CSHIGH
CS high time between two
consecutive byte transfer
1
-
-
T
SPICLK
t
CSHOLD
CS hold time
-
1
-
T
SPICLK
Table 18. SPI Read AC Timing
IRMCF311
26
7.10 UART AC Timing
TXD
RXD
Data and Parity Bit
Start Bit
T
BAUD
Stop Bit
T
UARTFIL
Unless specified, Ta = 25˚C.
Symbol
Parameter
Min
Typ
Max
Unit
T
BAUD
Baud Rate Period
-
57600
-
bit/sec
T
UARTFIL
UART sampling filter
period
(1)
-
1/16
-
T
BAUD
Table 19. UART AC Timing
Note:
(1) Each bit including start and stop bit is sampled three times at center of a bit at an interval of
1/16 T
BAUD
. If three sampled values do not agree, then UART noise error is generated.
IRMCF311
27
7.11 CAPTURE Input AC Timing
P1.4/CAP
CREV(H,L)
Internal
register
t
CAPHIGH
T
CAPCLK
t
CRDELAY
t
CAPLOW
t
CLDELAY
CLAST(H,L)
Internal
register
t
INTDELAY
Interrupt
Vector Fetch
Interrupt
Unless specified, Ta = 25˚C.
Symbol
Parameter
Min
Typ
Max
Unit
T
CAPCLK
CAPTURE input
period
8
-
-
SYSCLK
t
CAPHIGH
CAPTURE input high
time
4
-
-
SYSCLK
t
CAPLOW
CAPTURE input low
time
4
-
-
SYSCLK
t
CRDELAY
CAPTURE falling edge
to capture register latch
time
-
-
4
SYSCLK
t
CLDELAY
CAPTURE rising edge
to capture register latch
time
-
-
4
SYSCLK
t
INTDELAY
CAPTURE input
interrupt latency time
-
-
4
SYSCLK
Table 20. CAPTURE AC Timing

IRMCF311TR

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
Motor / Motion / Ignition Controllers & Drivers Dual-Ch 60 MHz 128MHz 8K RAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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