IRMCF311
28
7.12 JTAG AC Timing
TCK
TDO
t
JHIGH
T
JCLK
t
CO
t
JLOW
t
JSETUP
t
JHOLD
TDI/TMS
Unless specified, Ta = 25˚C.
Symbol
Parameter
Min
Typ
Max
Unit
T
JCLK
TCK Period
-
-
50
MHz
t
JHIGH
TCK High Period
10
-
-
nsec
t
JLOW
TCK Low Period
10
-
-
nsec
t
CO
TCK to TDO propagation
delay time
0
-
5
nsec
t
JSETUP
TDI/TMS setup time
4
-
-
nsec
t
JHOLD
TDI/TMS hold time
0
-
-
nsec
Table 21. JTAG AC Timing
IRMCF311
29
8 I/O Structure
The following figure shows the PWM and digital I/O structure.
6
.0
V
6.0V
Internal digital circuit
Low true logic
VDD1
(3.3V)
70k
PIN
270
Figure 7 All digital I/O and PWM outputs
The following figure shows RESET and GATEKILL I/O structure.
270
6.0V
6.0V
RESET
GATEKILL
circuit
VDD1
(3.3V)
70k
PIN
VSS
Figure 8 RESET, GATEKILL I/O
IRMCF311
30
The following figure shows the analog input structure.
1
6.0V
6.0V
Analog input
PIN
AVSS
Analog Circuit
AVDD
Figure 9 Analog input
The following figure shows all analog operational amplifier output pins and AREF pin I/O
structure.
6.0V
6.0V
Analog output
PIN
AVSS
Analog Circuit
AVDD
Figure 10 Analog operational amplifier output and AREF I/O structure
The following figure shows the VSS, AVSS and PLLVSS pin structure
PIN
VDD1
AVDD
PLLVDD
6.0V
Figure 11 VSS, AVSS and PLLVSS pin structure
The following figure shows the VDD1, VDD2, AVDD and PLLVDD pin structure

IRMCF311TR

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
Motor / Motion / Ignition Controllers & Drivers Dual-Ch 60 MHz 128MHz 8K RAM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet