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IRMCF311TR
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P36
IRMCF
311
28
7.12
JTAG AC
Timing
TCK
TDO
t
JHIGH
T
JCLK
t
CO
t
JLOW
t
JSETUP
t
JHOLD
TDI/TMS
Unless
specified
, Ta = 2
5
˚
C.
Symbol
Parameter
Min
Typ
Max
Unit
T
JC
LK
TCK
Peri
od
-
-
50
MHz
t
J
HIG
H
TCK
High Period
10
-
-
nsec
t
JLO
W
TCK
Low Period
10
-
-
nsec
t
CO
TCK
to TDO propagation
delay
time
0
-
5
nsec
t
JSE
TUP
TDI
/TMS setup time
4
-
-
nsec
t
JHOLD
TDI
/TMS hold time
0
-
-
nsec
Table
21
.
JTA
G
A
C Timing
IRMCF
311
29
8
I/O Structu
re
The f
ollowi
ng f
igure shows the PW
M and
di
gital I/O struc
ture.
6
.0
V
6.0V
Internal digital circuit
Low true logic
VDD1
(3.3V)
70k
Ω
PIN
270
Ω
Figure
7
A
ll digital I/O and
PWM output
s
The f
ollowi
ng f
igure shows RESET and GAT
EKILL I/O s
tructur
e.
270
Ω
6.0V
6.0V
RESET
GATEKILL
circuit
VDD1
(3.3V)
70k
Ω
PIN
VSS
Figure
8
RESET, GA
TEKILL I/O
IRMCF
311
30
The f
ollowi
ng f
igure shows the analog input
structur
e.
1
Ω
6.0V
6.0V
Analog input
PIN
AVSS
Analog Circuit
AVDD
Figure
9
A
na
log input
The f
ollowi
ng f
igure shows all analog operational amplif
ier out
put pins and AREF pin I/O
struct
ure.
6.0V
6.0V
Analog output
PIN
AVSS
Analog Circuit
AVDD
Figure
10
Analog operational ampli
fier output and A
RE
F I/O structure
The f
ollowi
ng
f
igure s
hows the VSS
, AVSS and PLLVSS
pin str
ucture
PIN
VDD1
AVDD
PLLVDD
6.0V
Figure
11
VSS,
A
VSS
and PLLV
SS pin structure
The f
ollowing figure s
hows the VDD1,
VDD2
, AVDD and PLLVDD
pin structure
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P36
IRMCF311TR
Mfr. #:
Buy IRMCF311TR
Manufacturer:
Infineon Technologies
Description:
Motor / Motion / Ignition Controllers & Drivers Dual-Ch 60 MHz 128MHz 8K RAM
Lifecycle:
New from this manufacturer.
Delivery:
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IRMCF311TR