NCV4276, NCV4276A
http://onsemi.com
15
Circuit Description
The NCV4276 is an integrated low dropout regulator that
provides a regulated voltage at 400 mA to the output. It is
enabled with an input to the inhibit pin. The regulator
voltage is provided by a PNP pass transistor controlled by
an error amplifier with a bandgap reference, which gives it
the lowest possible dropout voltage. The output current
capability is 400 mA, and the base drive quiescent current
is controlled to prevent oversaturation when the input
voltage is low or when the output is overloaded. The
regulator is protected by both current limit and thermal
shutdown. Thermal shutdown occurs above 150°C to
protect the IC during overloads and extreme ambient
temperatures.
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (V
Q
) and drives the base of a
PNP series pass transistor via a buffer. The reference is a
bandgap design to give it a temperature−stable output.
Saturation control of the PNP is a function of the load
current and input voltage. Oversaturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized. See Figure 4, Test Circuit, for
circuit element nomenclature illustration.
Regulator Stability Considerations
The input capacitors (C
I1
and C
I2
) are necessary to
stabilize the input impedance to avoid voltage line
influences. Using a resistor of approximately 1.0 W in
series with C
I2
can stop potential oscillations caused by
stray inductance and capacitance.
The output capacitor helps determine three main
characteristics of a linear regulator: startup delay, load
transient response and loop stability. The capacitor value
and type should be based on cost, availability, size and
temperature constraints. The aluminum electrolytic
capacitor is the least expensive solution, but, if the circuit
operates at low temperatures (−25°C to −40°C), both the
value and ESR of the capacitor will vary considerably. The
capacitor manufacturer’s data sheet usually provides this
information.
The value for the output capacitor C
Q
, shown in Figure 3,
should work for most applications; see also Figures 5 to 8
for output stability at various load and Output Capacitor
ESR conditions. Stable region of ESR in Figures 5 to 8
shows ESR values at which the LDO output voltage does
not have any permanent oscillations at any dynamic
changes of output load current. Marginal ESR is the value
at which the output voltage waving is fully damped during
four periods after the load change and no oscillation is
further observable.
ESR characteristics were measured with ceramic
capacitors and additional series resistors to emulate ESR.
Low duty cycle pulse load current technique has been used
to maintain junction temperature close to ambient
temperature.
Minimum ESR for C
Q
= 22 mF is native ESR of ceramic
capacitor with which the fixed output voltage devices are
performing stable. Murata ceramic capacitors were used,
GRM32ER71C226KE18 (22 mF, 16 V, X7R, 1210),
GRM31CR71C106KAC7 (10 mF, 16 V, X7R, 1206).
Calculating Bypass Capacitor
If usage of low ESR ceramic capacitors is demand in case
of Adjustable Regulator, connect the bypass capacitor C
b
between Voltage Adjust pin and Q pin according to
Applications circuit at Figure 4.
Parallel combination of bypass capacitor C
b
with the
feedback resistor R
1
contributes in the device transfer
function as an additional zero and affects the device loop
stability, therefore its value must be optimized. Attention
to the Output Capacitor value and its ESR must be paid. See
also Stability in High Speed Linear LDO Regulators
Application Note, AND8037/D for more information.
Optimal value of bypass capacitor is given by following
expression
C
b
+
1
2 p f
z
R
1
@ (F)
where
R
1
= the upper feedback resistor
f
z
= the frequency of the zero added into the device
transfer function by R
1
and C
b
external components.
Set the R
1
resistor according to output voltage
requirement. Chose the f
z
with regard on the output
capacitance C
Q
, refer to the table below.
C
Q
(mF) 10 22 47 100
f
z
Range (kHz) 20 - 50 14 - 35 10 - 20 7 – 14
Ceramic capacitors and its part numbers listed bellow
have been used as low ESR output capacitors C
Q
from the
table above to define the frequency ranges of additional
zero required for stability.
GRM31CR71C106KAC7 (10 mF, 16 V, X7R, 1206)
GRM32ER71C226KE18 (22 mF, 16 V, X7R, 1210)
GRM32ER61C476ME15 (47 mF, 16 V, X5R, 1210)
GRM32ER60J107ME20 (100 mF, 6.3 V, X5R, 1210)
Inhibit Input
The inhibit pin is used to turn the regulator on or off. By
holding the pin down to a voltage less than 0.5 V (or 1.8 V
for NCV4276A parts), the output of the regulator will be
turned off. During startup transient the regulator is off at
input voltage slew rates faster than 30 V/ms. When the
voltage on the Inhibit pin is greater than 3.5 V (or 2.8 V for
NCV4276A parts), the output of the regulator will be
enabled to power its output to the regulated output voltage.
The inhibit pin may be connected directly to the input pin
to give constant enable to the output regulator.
