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UBA20260T/1,518

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30
UBA20260 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 10 October 2011 16 of 30
NXP Semiconductors
UBA20260
600 V driver IC for step dimmable CFLs
The capacitive mode sink current starts to discharge the capacitor/resistor circuitry on
the CI pin and as a result, gradually increases the half-bridge frequency. Discharging
continues for the remainder of the current switching cycle ensuring the total current on the
CI pin is equal to the sink current. If capacitive mode persists, the action is repeated until
capacitive mode is no longer detected. If capacitive mode is no longer detected, the OTA
takes over the regulation again.
If the conditions for capacitive mode persist, OTA regulates the system back to capacitive
mode and the protection takes over again. The system operates on the edge of capacitive
mode.
When in the boost and burn states, the half-bridge load is capacitive at higher
frequencies, CMP eventually drives the half-bridge to the maximum frequency f
bridge(max)
.
This causes the IC to enter Power-down mode.
7.5.5 Overtemperature protection
The OTP circuit is designed to prevent the device from overheating in hazardous
environments. The circuit is triggered when the temperature exceeds the maximum
temperature value T
j(otp)
. OTP changes the lamp current to the level equal to the V
otp(CSI)
level. This condition remains until the temperature decreases by 20 C=T
j(otp)hys
. After
this decrease in temperature, the lamp current level returns to the nominal level.
7.5.6 Power-down mode
Power-down mode is entered when:
• The overcurrent time exceeds the maximum overcurrent fault time t
fault(oc)
or if the
overcurrent occurs in more than half the number of cycles when V
th(CP)min
is reached
• If during boost or burn state, f
bridge(max)
is reached due to capacitive mode detection
• Two consecutive failed lamp ignition attempts
In Power-down mode, the oscillator is stopped, the HS transistor is non-conductive and
the LS transistor is conductive. The V
DD
supply is internally clamped. The circuit is
released from Power-down mode by lowering the low voltage supply below V
DD(rst)
(mains
switch reset).
An option is available which enables the IC to enter Power-down mode using external
logic. The external power-down option is only available when the IC is in the boost or burn
state. The CP pin is used to enable the external power-down option. When the CP pin is
connected using a 10 k resistor to the PGND pin or the SGND pin, V
CP
is pulled below
V
th(pd)CP
. The IC then enters Power-down mode.
Remark: Do not connect the CP pin directly to pins PGND or SGND. Always connect in
series to pins PGND or SGND with a 10 k resistor. This action avoids the IC being not
starting up because of excessive currents flowing during the reset and start-up states.
UBA20260 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 10 October 2011 17 of 30
NXP Semiconductors
UBA20260
600 V driver IC for step dimmable CFLs
8. Limiting values
[1] Latch-up in accordance with SNW-FQ-303 on all pins.
9. Thermal characteristics
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
Symbol Parameter Conditions Min Max Unit
General
R
ext(RREF)
external resistance on
pin RREF
Fixed nominal value 33 k 30 36 k
SR slew rate on pins HBO with respect to PGND 4+4V/ns
T
j
junction temperature 40 +150 C
T
amb
ambient temperature P = 0.8 W 40 +85 C
T
stg
storage temperature 55 +150 C
Currents
I
i(CF)
input current on pin CF 0 200 A
Voltages
V
HBO
voltage on pin HBO operating - 500 V
during 1 s - 600 V
V
FS
voltage on pin FS with respect to HBO 0.3 +14 V
V
DD
supply voltage 0.3 +14 V
V
i(CSI)
input voltage on pin CSI 5+5V
V
i(SLS)
input voltage on pin
SLS
6+6V
V
CI
voltage on pin CI 0 3.5 V
V
MDL
voltage on pin MDL LPF used as input pin 0 5 V
ESD
V
ESD
electrostatic discharge
voltage
human body model:
all pins, except pins 14, 15 and 16
2000 +2000 V
pins 14, 15 and 16 1000 +1000 V
charged device model:
all pins 500 +500 V
Table 4. Thermal characteristics
Symbol Parameter Conditions Typ Unit
R
th(j-a)
thermal resistance from junction to ambient in free air; SO16 package 100 K/W
UBA20260 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 10 October 2011 18 of 30
NXP Semiconductors
UBA20260
600 V driver IC for step dimmable CFLs
10. Characteristics
Table 5. Characteristics
V
DD
=13 V; V
FS
V
HBO
=13 V; T
amb
=25
C; settings according to default setting see Table 6 on page 25, all voltages
referenced to PGND and SGND, positive currents flow into the UBA20260, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Start-up state
Pin V
DD
V
DD(rst)
reset supply voltage HS = off; LS = on 5.7 6.2 6.7 V
V
DD(stop)
stop supply voltage 9.6 10 10.4 V
V
DD(start)
start supply voltage 11.9 12.4 12.9 V
V
DD(hys)
hysteresis of supply voltage start-stop 2.2 2.4 2.6 V
V
DD(clamp)
clamp supply voltage I
DD(clamp)
= 5 mA 13 13.4 13.8 V
I
DD(clamp)
clamp supply current V
DD(clamp)
= 14 V 20 30 - mA
I
DD(startup)
start-up supply current V
DD
= 9 V - 190 220 A
I
DD(pd)
power-down supply current V
DD
= 9 V - 190 220 A
I
DD
supply current default setting; V
CI
=V
CI(clamp)
;
V
CB
=0V
[1]
-1.62mA
High-voltage supply
Pins GHS, HBO and FS
I
leak
leakage current 500 V on high-voltage pins - - 30 A
Voltage controlled oscillator
Output pin CI
V
CI(max)
maximum voltage on pin CI 2.7 3 3.3 V
V
hr(CI)
headroom voltage on pin CI V
clamp(CI)
= V
hr(CI)
+V
CI(max)
; burn
and boost state
-80-mV
Output pin CF
f
bridge(min)
minimum bridge frequency C
CF
= 100 pF; V
CI
= V
clamp(CI)
;
V
CB
=0V
[2]
38 40 42 kHz
f
bridge(max)
maximum bridge frequency C
CF
= 100 pF; V
CI
= 0 V
[2]
88 100 112 kHz
f
bridge(bst)min
minimum boost bridge frequency C
CF
= 100 pF; V
CI
= V
clamp(CI )
[2]
21 22 23 kHz
t
no
non-overlap time V
HBO
rising edge 1.3 1.5 1.7 s
V
HBO
falling edge 1.3 1.5 1.7 s
V
th(CF)max
maximum threshold voltage on pin
CF
C
CF
= 100 pF; V
CI
=V
clamp(CI)
;
V
CB
=0V
2.4 2.5 2.6 V
I
o(bst)CF
boost output current on pin CF V
CF
=1.5V; V
CB
=V
clamp(CI )
12.3 11.8 11.3 A
I
o(CF)min
minimum output current on pin CF V
CF
=1.5V; V
CB
=0V;
V
CI
=V
clamp(CI )
22.8 21.8 20.8 V
I
o(CF)max
maximum output current on pin CF V
CF
=1.5V; V
CB
=0V 67 60 53 A
Gate driver output
Output pins GLS, GHS
I
source(drv)
driver source current V
G
= 4 V (GLS or GHS);
V
HBO
=0V; V
DD
=V
FS
=12V
105 90 75 mA
R
sink(drv)
driver sink resistance V
G
= 2 V (GLS or GHS);
V
HBO
=0V; V
DD
=V
FS
=12V
13 15.5 18
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UBA20260T/1,518

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Manufacturer:
NXP Semiconductors
Description:
IC CFL LAMP DVR 600V 16-SOIC
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