Application Note Sep 2008
13 Order Number: 320005-04
Conversion Guide: P33 130nm to 65nm
5.4 Device Commands
The command set for the P33 65nm and P33 130nm devices are fully compatible.
However, the P33 65nm device includes new features such as the blank check operation
and the enhanced configuration operation. Command set operations are compared
here:
Note: During Buffered Program command (E8h) sequence, if a read of the Main Array Data needs to be performed during the
loading of the program buffer, then a write to an address outside of current block will abort the Buffer Programming
Operation. Issuing the Read Array command (FFh) will put the device into Read Array mode. After Main Array read
operation has been completed, the Buffer Program Operation must be restarted.
5.5 WAIT State Comparison
This section will compare the difference between the WAIT states on the P33 130nm
and the P33 65nm.
5.5.1 WAIT State P33 65nm
End of wordline (EOWL) WAIT states can result when the starting address of the burst
operation is not aligned to a 16-word boundary; that is, A[3:0] of start address does
not equal 0x0. Figure 3, “End of Wordline Timing Diagram” on page 14 illustrates the
end of wordline WAIT state(s), which occur after the first 16-word boundary is reached.
The number of data words and the number of WAIT states for both P33 130nm and P33
65nm are summarized in Table 9, “End of Wordline Data and WAIT State Comparison”
on page 14.
Table 8: Command Bus Operations
Command
P33 130nm Code
(Setup/Confirm)
P33 65nm Code
(Setup/Confirm)
Read Modes
Read Array 00FFh 00FFh
Read Status Register 0070h 0070h
Clear Status Register 0050h 0050h
Read Device Information 0090h 0090h
CFI Query 0098h 0098h
Program/Erase Operations
Word Program 0040h 0040h
Buffered Program 00E8h/00D0h 00E8h/00D0h
Buffered Enhanced Factory Program 0080h/00D0h 0080h/00D0h
Block Erase 0020h/00D0h 0020h/00D0h
Program/Erase Suspend 00B0h 00B0h
Program/Erase Resume 00D0h 00D0h
Blank Check N/A 00BCh/00D0h
Security
Lock Block 0060h/0001h 0060h/0001h
Unlock Block 0060h/00D0h 0060h/00D0h
Lock Down Block 0060h/002Fh 0060h/002Fh
Password Access N/A 00EBh
Registers
Program Read Configuration Register 0060h/0003h 0060h/0003h
Program OTP Register 00C0h 00C0h
Conversion Guide: P33 130nm to 65nm
Application Note Sep 2008
14 Order Number: 320005-04
5.5.2 WAIT State P33 130nm
After encountering an EOWL situation, periodic WAIT states can occur in general as
illustrated in Figure 4, “Periodic WAIT State Timing Diagram” on page 15.
Figure 10, “Periodic Data and WAIT State Comparison” on page 15 shows that P33
130nm has periodic WAIT states, but P33 65nm does not.
Figure 3: End of Wordline Timing Diagram
Table 9: End of Wordline Data and WAIT State Comparison
Latency Count
P33 130nm P33 65nm
Data States WAIT States Data States WAIT States
1 Not Supported Not Supported Not Supported Not Supported
240 to 1Not Supported Not Supported
340 to 216 0 to 2
440 to 316 0 to 3
540 to 416 0 to 4
640 to 516 0 to 5
740 to 616 0 to 6
8
Not Supported Not Supported
16 0 to 7
9 16 0 to 8
10 16 0 to 9
11 16 0 to 10
12 16 0 to 11
13 16 0 to 12
14 16 0 to 13
15 16 0 to 14
A[Max:1]
ADV#
OE#
WAIT
DQ[15:0]
Data Data Data
EOWL
CLK
Latency Count
Application Note Sep 2008
15 Order Number: 320005-04
Conversion Guide: P33 130nm to 65nm
5.6 CFI Differences
P33 65nm has a different CFI revision. During adoption of Numonyx or third party
software, several differences must be taken into account. This section will describe the
changes.
5.6.1 CFI revision
The CFI minor revision sorted in offset (P+4)h remains as 5.
CFI version 1.5 is supported in the software provided by Numonyx.
5.6.2 Time-out changes
All CFI time-out changes are listed in Table 11, “Value Changes”
Figure 4: Periodic WAIT State Timing Diagram
Table 10: Periodic Data and WAIT State Comparison
Latency Count
P33 130nm P33 65nm
Data States WAIT States Data States WAIT States
1 Not Supported Not Supported Not Supported Not Supported
24 0Not Supported Not Supported
34 0 16 0
44 0 16 0
54 1 16 0
64 2 16 0
74 3 16 0
8
Not Supported Not Supported
16 0
9 16 0
10 16 0
11 16 0
12 16 0
13 16 0
14 16 0
15 16 0
Addr[ Max:16]
Addr[15:0] Data Data Data Data
Periodic Periodic
Latency CountLatency Count
CLK
A[MAX:16]
ADV#
OE#
D[1 5: 0]
WAIT
A [Max :1]
Data

TE28F256P33BFA

Mfr. #:
Manufacturer:
Micron
Description:
IC FLASH 256M PARALLEL 56TSOP
Lifecycle:
New from this manufacturer.
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