MAX8520/MAX8521
Smallest TEC Power Drivers for Optical
Modules
_______________________________________________________________________________________ 9
PIN
TQFN UCSP/WLP
NAME
FUNCTION
10 A5 CTLI
TEC Current-Control Input. Sets TEC current. Center point is 1.50V (no TEC current). The
current is given by:
I
TEC
= (V
OS1
- V
CS
) / R
SENSE
= (V
CTLI
- 1.50) / (10 x R
SENSE
). When (V
CTLI
- V
REF
) > 0V
then V
OS2
> V
OS1
> V
CS
.
11 A6 GND Analog Ground. Star connect to PGND at underside exposed pad for TQFN package.
12 B6 V
DD
Analog Supply Voltage Input. Bypass V
DD
to GND with a 1µF ceramic capacitor.
For MAX8520: Analog FREQ Set Pin (see the Switching Frequency section).
13 C5 FREQ
For MAX8521: Digital FREQ Selection Pin. Connect to V
DD
for 1MHz operation, connect to
GND for 500kHz operation. The PWM oscillator can synchronize to FREQ by switching at
FREQ between 700kHz and 1.2MHz.
14 D6, D5, D4 PGND2
Power Ground 2. Internal synchronous rectifier ground connection. Connect all PGND
pins together at the power ground plane.
15 E5, E6 LX2 Inductor Connection. LX2 is high-impedance in shutdown.
16 F5, F6 PVDD2 Power Input 2. Connect all PVDD inputs together at the V
DD
power plane.
17 F4 CS
Current-Sense Input. The current through the TEC is monitored between CS and OS1. The
maximum TEC current is given by 150mV/R
SENSE
and is bipolar.
18 C6 OS2
Output Sense 2. OS2 senses one side of the differential TEC voltage. OS2 is a sense
point, not a power output. OS2 discharges to ground in shutdown.
19 F3 OS1
Output Sense 1. OS1 senses one side of the differential TEC voltage. OS1 is a sense
point, not a power output. OS1 discharges to ground in shutdown.
20 F1, F2 PVDD1 Power Input 1. Connect all PVDD inputs together at the V
DD
power plane.
B2, B5, C3,
C4
GND2
Ground. Additional ground pads aid in heat dissipation. Short to either GND or PGND
plane.
B3, B4
E3, E4
N.C. No Connect. Connect N.C. pads to GND2 to aid in heat dissipation.
——EP
Exposed Paddle (TQFN Only). Internally connected to GND. Connect to a large ground
plane to maximize thermal performance. Not intended as an electrical connection point.
Pin Description (continued)