OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

ADM1029ARQZ-R7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P50
ADM1029
http://onsemi.com
16
Figure 27. Fan with Strong Tach. Pull-up to > V
CC
or
Totem-pole Output, Clamped with Zener and Resistor
12 V V
CC
FAN SPEED
COUNTER
TACH
OUTPUT
TACH1
OR
TACH 2
PULL-UP
TYP < 1 kW
OR TOTEM-POLE
ZD1*
ZENER
* Choose ZD1 Voltage Approx. 0.8 V
CC
R1
10 kW
Figure 28. Fan with Strong Tach. Pull-up to > V
CC
or
Totem-pole Output, Attenuated with R1/R2
12 V V
CC
FAN SPEED
COUNTER
TACH
OUTPUT
TACH1
OR
TACH 2
< 1 kW
R2*
*
See
Tex t
R1*
Fan Speed Control
Fan speed is controlled using pulsewidth modulation
(PWM). The PWM outputs (Pins 1 and 24) give a pulse
output with a programmable frequency (default 250 Hz) and
a duty-cycle defined by the contents of the relevant fan speed
register, or by the automatic fan speed control when this
mode is enabled. The speed at which a fan runs is determined
by fault conditions and the settings of various control and
mask registers.
A fan can only be driven if it is defined as being supported
by the controller in register 02h. The ADM1029 supports up
to two fans, so Bits 0 and 1 of this register are permanently
set. This register is read-only.
A fan will only be driven if it is defined as being supported
by the system in register 03h. If Bit 0 of this register is set,
it indicates that Fan 1 is installed. This is the power-on
default. If Bit 1 is set, it indicates that Fan 2 is installed. This
bit is set by the state of Pin 18 at power-up. This register is
read/write and the default/power-on setting can be
overwritten. If a fan is not supported in register 03h it will
not be driven, even if it is physically installed.
The PWM outputs are open-drain outputs. They require
pull-up resistors and must be amplified and buffered to drive
the fans.
Minimum Speed
The normal operating fan speed is set by the four LSBs of
the Fan 1 and Fan 2 Minimum/Alarm Speed Registers
(addresses 60h, 61h). These bits also set the minimum speed
at which a fan will run in automatic control mode. These bits
should be set to 05h. This corresponds to 33% PWM
duty-cycle, which is the lowest speed at which most fans will
run reliably.
Fan(s) will run at minimum speed if there is no fault
condition, automatic fan speed is disabled, and there are no
other overriding conditions.
Alarm Speed
Alarm speed is set by the four MSBs of the Fan 1 and
Fan 2 Minimum/Alarm Speed Registers (addresses 60h,
61h). Fan(s) will run at alarm speed if any of the following
conditions occurs, assuming the condition has not been
masked out using the Fan Event Mask Registers:
Setting Bit 0 of register 07h forces Fan 1 to run at alarm
speed (Set Fan x Alarm Speed Register).
Setting Bit 1 of register 07h forces Fan 2 to run at alarm
speed (Set Fan x Alarm Speed Register).
If monitoring is disabled by clearing Bit 4 of the
Configuration Register, all fans controlled by the
ADM1029 will run at alarm speed.
When a GPIO pin is configured as an input by setting
Bit 0 of the corresponding GPIO Behavior Register,
and Bit 4 of the GPIO Behavior Register is also set, all
fans controlled by the ADM1029 will go to alarm speed
when the logic input is asserted (high or low, depending
on the polarity bit, Bit 1 of the corresponding GPIO
Behavior Register).
If Bit 7 of a Fan Fault Action Register is set
(18h − Fan 1, 19h − Fan 2) the corresponding fan will
go to alarm speed when CFAULT
is pulled low by an
external source.
If a tach measurement exceeds the set limit, all fans
controlled by the ADM1029 will run at alarm speed.
If a fan fault input pin is asserted (low), all fans
controlled by the ADM1029 will run at alarm speed.
If Bit 1 of a Temp. Fault Action Register is set
(40h − Local Sensor, 41h − Remote 1, 42h − Remote 2),
all fans controlled by the ADM1029 will go to alarm
speed if the corresponding temperature high limit is
exceeded.
If Bit 5 of a Temp. Fault Action Register is set, all fans
controlled by the ADM1029 will go to alarm speed if a
temperature input crosses the corresponding
temperature low limit, the direction depending on the
setting of Bit 3 of the Temp. Control register.
(0 = alarm when input goes below low limit, 1 = alarm
when input goes above low limit).
If Bit 1 of an AIN Behavior Register is set
(50h − AIN0, 51h − AIN1), all fans controlled by the
ADM1029 will go to alarm speed if the corresponding
AIN high limit is exceeded.
If Bit 5 of an AIN Behavior Register is set, all fans
controlled by the ADM1029 will go to alarm speed if
ADM1029
http://onsemi.com
17
an analog input crosses the corresponding AIN low
limit, the direction depending on the setting of Bit 3 of
the AIN control register. (0 = alarm when input goes
below low limit, 1 = alarm when input goes above low
limit).
If a thermal override occurs while the ADM1029 is in
sleep mode, all fans controlled by the ADM1029 will
run at alarm speed.
Hot-plug Speed
Hot-plug speed is set by the four LSBs of the Fan 1 and
Fan 2 Configuration Registers (addresses 68h and 69h). The
PWM frequency is set by Bits 4 and 5 of these registers,
while Bits 6 and 7 set the number of pulses per revolution for
fan speed measurement.
Fan(s) will run at hot-plug speed if any of the following
conditions occur, assuming the condition has not been
masked using the Fan Event Mask Registers:
If a fan is unplugged, the other fan (if any) controlled
by the ADM1029 will run at hot-plug speed.
Setting Bit 0 of register 08h forces Fan 1 to run at
hot-plug speed (Set Fan x Hot-plug Speed).
Setting Bit 1 of register 08h forces Fan 2 to run at
hot-plug speed (Set Fan x Hot-plug Speed).
When a GPIO pin is configured as an input by setting
Bit 0 of the corresponding GPIO Behavior Register,
and Bit 5 of the GPIO Behavior Register is also set, all
fans controlled by the ADM1029 will go to hot-plug
speed when the logic input is asserted (high or low,
depending on the polarity bit, Bit 1 of the
corresponding GPIO Behavior Register).
If Bit 6 of a Fan Fault Action Register is set (18h for
Fan 1, 19h for Fan 2) the corresponding fan will go to
hot-plug speed when CFAULT
is pulled low by an
external source.
NOTE: if operating conditions and register settings are such that
both alarm speed and hot-plug speed would be triggered,
which one takes priority is determined by Bit 5 of the Fan 1
and Fan 2 Status Registers (addresses 10h and 11h). If this
bit is set, hot-plug speed takes priority. If it is cleared, alarm
speed takes priority.
Full Speed
Fans will run at full speed if the corresponding bits in the
Set Fan x Full Speed Register (address 09h) are set: Bit 0 for
Fan 1 and Bit 1 for Fan 2.
Fan Mask Registers
The effect of various conditions on fan speed can be
enabled or disabled by mask registers. In all these registers,
setting Bit 0 of the register enables Fan 1 to go to alarm
speed or hot-plug speed if the corresponding event occurs,
while setting Bit 1 enables Fan 2. Clearing these bits masks
the effect of the corresponding event on fan speed.
Registers 20h and 21h are Fan Event Mask Registers.
Bits 0 and 1 of register 20h enable (bit set) or mask (bit clear)
the effect of a Fan 1 fault (underspeed or fault input) on
Fan 1 and Fan 2 speed. Similarly, Bits 0 and 1 of register 21h
enable (bit set) or mask (bit clear) the effect of a Fan 2 Fault
on Fan 1 and Fan 2 speed.
Registers 38h to 3Eh are GPIO X Event Mask Registers.
Bits 0 and 1 of these registers enable or mask the effect of a
GPIO assertion on Fan 1 and Fan 2 speed.
NOTE: Registers 48h to 4Ah are Temp. Cooling Action Registers.
Bits 0 and 1 of these registers enable or mask the effect of
Local, Remote 1, and Remote 2 temperature faults on
Fan 1 and Fan 2 speed. These registers also determine
which temperature channel controls each fan in automatic
fan speed control mode, as described later.
Registers 58h and 59h are AIN Event Mask Registers.
Bits 0 and 1 of these registers enable or mask the effect of an
AIN out-of-limit event on Fan 1 and Fan 2 speed.
Modes of Operation
The ADM1029 has three different modes of operation.
These modes determine the behavior of the system.
1. PWM Duty Cycle Select Mode (directly sets fan speed
under software control)
2. Thermal Trip Mode
3. Automatic Fan Speed Control Mode
PWM Duty Cycle Select Mode
The ADM1029 may be operated under software control
by clearing bits <1:0> of the three Temp Cooling Action
Registers (Reg 0x48, 0x49, 0x4A). Once under Software
Control, each fan speed may be controlled by programming
values of PWM Duty Cycle in to the device. Values of PWM
Duty Cycle between 0% to 100% may be written to the four
LSBs of the Fan 1 and Fan 2 Minimum/Alarm Speed
Registers (addresses 60h, 61h). to control the speed of each
fan. Table 9 shows the relationship between hex values
written to the Minimum/Alarm Speed Registers and PWM
duty cycle obtained.
Table 9. PWM DUTY CYCLE SELECT MODE
Hex Value PWM Duty Cycle
00 0%
01 7%
02 14%
03 20%
04 27%
05 33% Recommended
06 40%
07 47%
08 53%
09 60%
0A 67%
0B 73%
0C 80%
0D 87%
0E 93%
0F 100% (Default)
ADM1029
http://onsemi.com
18
It is recommended that the minimum PWM duty cycle be
set to 33% (0x05). This has been determined to be the lowest
PWM duty cycle that most fans will run reliably at. Note that
the PWM duty cycle values programmed in to these registers
also define the PWM duty cycle that the fans will turn on at,
in Automatic Fan Speed Control Mode. It is recommended
that after power-up, the PWM duty cycle is set to 33% before
enabling Automatic Fan Speed Control.
Thermal Trip Mode
The ADM1029 can thermally trip the fan(s) for simple
on/off fan control, or 2-speed fan control. For example, a fan
can be programmed to run at 33% duty cycle. If the
temperature exceeds the high temperature limit set for that
temperature channel, the fan can automatically trip and run
at Alarm Speed. The fan will continue to run at Alarm Speed
even if the temperature error condition subsides, until the
Latch Temp Fault bit (Bit 7 of the Temp x Fault Action Reg)
is cleared in software by writing a 0 to it. To configure Fan 1
normally, run at 33% but to thermally trip to Alarm Speed
for a Remote 2 measured temperature of 70C, set up the
following registers:
1. Configure the normal PWM duty cycle for Fan 1
to 33%.
Fan 1 MinimumńAlarm Speed Reg (0x60) + 0xF5
2. Set the Remote 2 High Temperature Limit = 70C.
Remote2TempHighLimitReg(0x92)+ 0x46
3. Configure Alarm Speed on Overtemperature
function for Remote 2 Temperature channel.
Set Bit 1 of Temp 2 Fault Action Reg (0x42)
4. Enable Fan 1 to be controlled by Remote 2
Temperature.
SetBit0ofTemp2CoolingActionReg(0x4A)
Once the fan thermally trips to Alarm Speed, it will
continue to run at Alarm Speed until the temperature drops
below the High Temperature Limit and the Latch Temp Fault
bit (Bit 7 of the Temp 2 Fault Action Reg) is cleared to 0.
Event Latch Bits
Certain events that occur will cause latch bits to be set in
various registers on the ADM1029. Once a latch bit is set, it
will need to be cleared by software for the system to return
to normal operation. To detect if a latch bit has been set, the
INT
pin can be used to signal a latch event to the system
supervisor. Alternatively, the Status Registers can be polled
periodically, and any latch bits that are set can be cleared.
The events that cause latch bits to be set are:
1. Thermal Events. If the fan is run at Alarm Speed
on Overtemperature or Undertemperature, this will
set the Latch Temp Fault bit (Bit 7 of the
Temp x Fault Action Registers 0x40–0x42).
2. Missing Fan. If a fan is missing, i.e., has been
unplugged, the Missing Latch bit (Bit 1 of
Fan x Status Registers) is set.
3. Hotplugged Fan. If a new fan is inserted into the
system, Bit 7 (Hotplug Latch bit) of the
Fan x Status Register is set.
4. FAULT Asserted. If the fan becomes stuck and its
FAULT output asserts low, Bit 2 (Fault Latch bit)
of the Fan x Status register is set.
5. TACH Failure. If the fan runs underspeed or
becomes stuck, then Bit 6 (Tach Fault Latch Bit)
of the Fan x Status Register is set.
Automatic Fan Speed Control
The ADM1029 has a local temperature channel and two
remote temperature channels, which may be connected to an
on-chip diode-connected transistor on a CPU or a
general-purpose discrete transistor. These three temperature
channels may be used as the basis for an automatic fan speed
control loop to drive fans using Pulsewidth Modulation
(PWM).
How Does The Control Loop Work?
The Automatic Fan Speed Control Loop is shown in
Figure 29.
Figure 29. Automatic Fan Speed Control
TEMPERATURE
FAN SPEED
T
MIN
MIN
MAX
T
MAX
= T
MIN
+ T
RANGE
SPIN UP FOR 2 SECONDS
In order for the fan speed control loop to work, certain
loop parameters need to be programmed in to the device:
1. T
MIN
. This is the temperature at which a fan
should switch on and run at minimum speed. The
fan will only turn on once the temperature being
measured rises above the T
MIN
value programmed.
The fan will spin up for a predetermined time
(default = 2 secs). See Fan Spin-up section for
more details.
2. T
RANGE
. This will be the temperature range over
which the ADM1029 will automatically adjust fan
speed. As the temperature increases beyond T
MIN
,
the PWM duty cycle will be increased accordingly.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P50

ADM1029ARQZ-R7

Mfr. #:
Buy ADM1029ARQZ-R7
Manufacturer:
ON Semiconductor
Description:
IC SENSOR 2TEMP/FAN CTRL 24QSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet