ADM1029
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Reset Input
Pin 12 is an active-low system RESET input. Taking this
pin low will generate a system reset, which will reset all
registers to their default values.
Analog Inputs
Pins 19 and 20 of the ADM1029 are dual-function pins.
They may be configured as general-purpose logic I/O pins
by setting Bits 0, 1 of the GPIO Present/AIN Register
(address 05h) or as 0 V to 2.5 V analog inputs by clearing
these bits.
In the analog input mode, Pins 19 and 20 have an input
range of 0 V to 2.5 V. By suitable input scaling, the analog
input may be configured to measure other voltage ranges
such as system power supply voltages. If more than one
ADM1029 is used in a system, several such voltages may be
monitored.
The measured values of AIN0 and AIN1 are stored in the
AIN0 and AIN1 Value Registers (addresses B8h and B9h)
and are compared to high and low limits stored in the AIN0
and AIN1 High and Low Limit Registers (addresses A8h,
A9h and B0h, B1h).
The response of the ADM1029 to an out-of-limit
measurement on AIN0 or AIN1 depends on the status of the
AIN0 and AIN1 Behavior Registers (Registers 50h, 51h).
The response of CFAULT
, INT, and fan speed to temperature
events depends on the setting of these registers, as detailed
in the register tables later in this data sheet. Figure 38 shows
how the AIN pins can be configured to respond to different
events.
Analog Monitoring Cycle
The ADM1029 performs a sequential “round-robin,”
monitoring cycle on all analog inputs and temperature inputs
that are enabled. A conversion on AIN0 or AIN1 typically
takes 11.6 ms, while an external temperature conversion
takes 185.6 ms.
Interrupt (INT) Output
The INT output is an open-drain output with selectable
polarity, intended to communicate fault conditions to the
host processor. The polarity is set to active low by clearing
Bit 7 of the Configuration Register (address 01h) or to active
high by setting this bit.
INT
can be asserted if any of the following conditions
occur:
A hot-plug event
Setting Bit 6 of the Configuration Register
(address 01h) forces INT
to be asserted
When a GPIO pin is configured as an input by setting
Bit 0 of the corresponding GPIO Behavior Register and
Bit 3 of the GPIO Behavior Register is also set, INT
will be asserted when the logic input is asserted (high
or low, depending on the polarity bit, Bit 1 of the
corresponding GPIO Behavior Register)
If Bit 2 of a Temp. Fault Action Register is set
(40h − Local Sensor, 41h − Remote 1, 42h − Remote 2),
INT
will be asserted if the corresponding temperature
high limit is exceeded
If Bit 6 of a Temp. Fault Action Register is set, INT
will be asserted if a temperature input crosses the
corresponding temperature low limit, the direction
depending on the setting of Bit 3 of the Temp. Fault
Action register. (0 = INT
when temperature goes below
low limit, 1 = INT
when temperature goes above low
limit)
If Bit 1 of a Fan Fault Action Register (18h or 19h) is
set, INT
will be asserted when a tach measurement for
the corresponding fan exceeds the set limit
If Bit 1 of a Fan Fault Action Register (18h or 19h) is
set, INT
will be asserted when the fan fault input pin
for the corresponding fan is asserted (low)
If Bit 2 of an AIN Behavior Register is set
(50h − AIN0, 51h − AIN1), INT
will be asserted if the
corresponding AIN high limit is exceeded
If Bit 6 of an AIN Behavior Register is set, INT will be
asserted if the corresponding analog input crosses its
AIN low limit, the direction depending on the setting of
Bit 3 of the AIN Behavior register. (0 = INT
when input
goes below low limit, 1 = INT
when input goes above
low limit)
Fan Free-Wheeling Test
The Fan Free-Wheeling Test is used to diagnose fans
connected to the ADM1029 to ensure that they are operating
correctly. Large fans tightly coupled in a duct can affect each
other’s airflow. If one fan has failed it may not be apparent,
as the other fan moving can suck air through the faulty fan
causing it to spin. The ADM1029 will spin each fan up
separately with the other powered down and measure the fan
speed of both. When it tries to spin the failed fan with the
working fan off, the fan speed measurement will fail, and the
faulty fan will be detected. The Fan Free-Wheel Test can be
invoked at any time in software by setting Bit 3 of the
Configuration Register (Reg. 0x01). The Fan Free-Wheel
Test normally takes about 10 seconds. Once the Fan
Free-Wheel test has completed, Bit 3 will automatically
clear to 0.
Automatic Fan Free-Wheel Test
Whenever a fan is hot-plugged, the Fan Free-Wheel Test
is automatically invoked. Bit 3 gets set high automatically
and once the test has completed, self-clears to 0. If 2 fans are
installed in the system, the Fan Free-Wheel Test is invoked
by removing the suspect fan and hotplugging a new one.
When the suspect fan (e.g., Fan 1) is removed, the Missing
bit (Bit 0) and Missing Latch bit (Bit 1) of the Fan 1 Status
Register are set. Fan 2 will then automatically run at
HotPlug Speed. If the faulty fan is replaced, the HotPlug
Latch bit (Bit 7) is set and the Missing bit (Bit 0) self-clears.
(However, the Missing Latch bit remains set.) Fan 2 will
return to its previous value automatically and the Fan
Free-Wheel Test is invoked. Fan 1 is run at 100% while
