ADM1029
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28
General Purpose Logic Input/Outputs
The ADM1029 has six dual-function pins (see Pin
Function Descriptions section) that may be configured as
general-purpose Logic I/O pins by setting the appropriate
bit(s) of the GPIO Present/AIN Register (address 05h) or as
their alternate functions by clearing these bits.
When configured as GPIO pins, each GPIO pin has a
Behavior Register associated with it (Registers 28h to 2Eh)
that may be used to configure the operation of the pin.
The GPIO pins may be configured as inputs or outputs.
When used as inputs, they may be configured to:
Be Active High or Active Low
Set/Clear a Bit in the Behavior Register when GP Input
Is Asserted/Deasserted
Latch a Bit In the Behavior Register when GP Input Is
Asserted (Must Be Cleared by Software)
Assert CFAULT when GP Input Asserted
Assert INT when GP Input Asserted
Set Fan(s) to Alarm Speed when GP Input Asserted
Set Fan(s) to Hot-plug Speed when GP Input Asserted
When Used as Outputs, They May Be Configured to:
Be Active High or Low
Be Asserted If a High Temperature Limit Is Exceeded
Be Asserted If a Temperature Measurement Falls
Below a Low Limit
Be Asserted If a Fan Fault Is Detected
Be Asserted If a Fan Tach Limit Is Exceeded
Be Asserted If an AIN High Limit Is Exceeded
Be Asserted If an Analog Input Falls Below a Low
Limit
Figure 39 shows how to configure the GPIO pins to
handle different out-of-limit and fault events.
CFAULT Output
The Cascade Fault output (CFAULT), is an open-drain,
active low output, intended to communicate fault conditions
to other ADM1029s in a system, without the intervention of
the host processor. The other ADM1029’s may then adjust
their fans’ speed to compensate, depending on the settings
of various registers.
CFAULT
is asserted if any of the following conditions
occurs:
A Hot-plug Event
Setting Bit 5 of the Configuration Register (Address
01h) forces CFAULT
to be asserted
When a GPIO pin is configured as an input by setting
Bit 0 of the corresponding GPIO Behavior Register and
Bit 2 of the GPIO Behavior Register is also set,
CFAULT
will be asserted when the logic input is
asserted (high or low depending on the polarity bit,
Bit 1 of the corresponding GPIO Behavior Register)
If Bit 0 of a Temp. Fault Action Register is set
(40h − Local Sensor, 41h − Remote 1, 42h − Remote 2),
CFAULT
will be asserted if the corresponding
temperature high limit is exceeded
If Bit 4 of a Temp. Fault Action Register is set,
CFAULT
will be asserted if a temperature input crosses
the corresponding temperature low limit, the direction
depending on the setting of Bit 3 of the Temp. Fault
Action Register. (0 = CFAULT
when input goes below
low limit, 1 = CFAULT
when input goes above low
limit)
If Bit 0 of a Fan Fault Action Register (18h or 19h) is
set, CFAULT
will be asserted when a tach measurement
for the corresponding fan exceeds the set limit
If Bit 0 of a Fan Fault Action Register (18h or 19h) is
set, CFAULT
will be asserted, when the fan fault input
pin for the corresponding fan is asserted (low)
If Bit 0 of an AIN Behavior Register is set
(50h − AIN0, 51h − AIN1), CFAULT
will be asserted if
the corresponding AIN high limit is exceeded
If Bit 4 of an AIN Behavior Register is set, CFAULT
will be asserted if an analog input crosses the
corresponding AIN low limit, the direction depending
on the setting of Bit 3 of the AIN Behavior Register.
(0 = CFAULT
when input goes below low limit,
1 = CFAULT
when input goes above low limit).
