PSMN3R3-80ES All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 31 October 2011 5 of 14
NXP Semiconductors
PSMN3R3-80ES
N-channel 80 V, 3.3 mΩ standard level MOSFET in I2PAK
6. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
drain-source breakdown
voltage
I
D
= 250 µA; V
GS
=0V; T
j
=-55°C 73--V
I
D
= 250 µA; V
GS
=0V; T
j
=25°C 80--V
V
GS(th)
gate-source threshold
voltage
I
D
=1mA; V
DS
=V
GS
; T
j
=175°C;
see Figure 10
1--V
I
D
=1mA; V
DS
=V
GS
; T
j
=-55°C;
see Figure 10
--4.6V
I
D
=1mA; V
DS
=V
GS
; T
j
=25°C;
see Figure 10; see Figure 11
234V
I
DSS
drain leakage current V
DS
=80V; V
GS
=0V; T
j
= 25 °C - 0.02 10 µA
V
DS
=80V; V
GS
=0V; T
j
= 175 °C - - 500 µA
I
GSS
gate leakage current V
GS
=-20V; V
DS
=0V; T
j
= 25 °C - - 100 nA
V
GS
=20V; V
DS
=0V; T
j
= 25 °C - - 100 nA
R
DSon
drain-source on-state
resistance
V
GS
=10V; I
D
=25A; T
j
=175°C;
see Figure 12
-6.77.9mΩ
V
GS
=10V; I
D
=25A; T
j
=100°C;
see Figure 12
-4.65.4mΩ
V
GS
=10V; I
D
=25A; T
j
=25°C;
see Figure 13
[1]
-2.83.3mΩ
R
G
internal gate resistance (AC) f = 1 MHz - 0.9 - Ω
Dynamic characteristics
Q
G(tot)
total gate charge I
D
=0A; V
DS
=0V; V
GS
= 10 V - 135 - nC
I
D
=75A; V
DS
=40V; V
GS
=10V;
see Figure 14
; see Figure 15
- 139 - nC
Q
GS
gate-source charge - 51 - nC
Q
GS(th)
pre-threshold gate-source
charge
-30-nC
Q
GS(th-pl)
post-threshold gate-source
charge
-21-nC
Q
GD
gate-drain charge - 27 - nC
V
GS(pl)
gate-source plateau voltage I
D
=25A; V
DS
=40V; see Figure 14;
see Figure 15
-5.8-V
C
iss
input capacitance V
DS
=40V; V
GS
=0V; f=1MHz;
T
j
= 25 °C; see Figure 16
- 9961 - pF
C
oss
output capacitance - 847 - pF
C
rss
reverse transfer capacitance - 401 - pF
t
d(on)
turn-on delay time V
DS
=40V; R
L
=0.53Ω; V
GS
=10V;
R
G(ext)
=10Ω; I
D
=75A
-41-ns
t
r
rise time - 43 - ns
t
d(off)
turn-off delay time - 109 - ns
t
f
fall time - 44 - ns