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83905AK-01LF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
83905-01 DATA SHEET
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS FANOUT BUFFER 10 REVISION 1 05/01/15
Parameter Measurement Information
1.8V Core/1.8V LVCMOS Output Load Test Circuit
1.2V Core/1.2V LVCMOS Output Load Test Circuit
1.8V Core/1.2V LVCMOS Output Load Test Circuit
1.5V Core/1.5V LVCMOS Output Load Test Circuit
1.8V Core/1.5V LVCMOS Output Load Test Circuit
1.5V Core/1.2V LVCMOS Output Load Test Circuit
SCOPE
Qx
GND
SCOPE
Qx
GND
SCOPE
Qx
GND
SCOPE
Qx
GND
SCOPE
Qx
GND
SCOPE
Qx
GND
REVISION 1 05/01/15 11 LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS FANOUT BUFFER
83905-01 DATA SHEET
Parameter Measurement Information, continued
Output Skew
Output Rise/Fall Time
Output Enable/Disable
RMS Phase Jitter
Output Duty Cycle/Pulse Width/Period
tsk(b)
V
DDO
2
V
DDO
2
20%
80%
80%
20%
t
R
t
F
V
DD
/2 V
DD
/2
V
DDO
/2
V
OL
V
OH
0V
V
DD
t
DIS
t
EN
Output BCLKx
(See Note)
OEx
(High-level
enabling)
t
PERIOD
t
PW
t
PERIOD
odc =
V
DDO
2
x 100%
t
PW
83905-01 DATA SHEET
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS FANOUT BUFFER 12 REVISION 1 05/01/15
Application Information
Recommendations for Unused Output Pins
Outputs:
LVCMOS Outputs
All unused LVCMOS output can be left floating. There should be no
trace attached.
Crystal Input Interface
The 83905-01 has been characterized with 18pF parallel resonant
crystals. The capacitor values, C1 and C2, shown in Figure 2 below
were determined using an 18pF parallel resonant crystal and were
chosen to minimize the ppm error. The optimum C1 and C2 values
can be slightly adjusted for different board layouts.
Figure 2. Crystal Input Interface
XTAL_IN
XTAL_OUT
X1
18pF Parallel Crystal
C1
15pF
C2
15pF
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

83905AK-01LF

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