SMBus Table: Output Enable Register
Byte 0 Name Control Function Type 0 1 Default
Bit 7
1
Bit 6
1
Bit 5
1
Bit 4
1
Bit 3
DIF OE3 Output Enable RW Low/Low Enabled 1
Bit 2
DIF OE3 Output Enable RW Low/Low Enabled 1
Bit 1
DIF OE2 Output Enable RW Low/Low Enabled 1
Bit 0
DIF OE1 Output Enable RW Low/Low Enabled 1
SMBus Table: SS Readback and Vhigh Control Register
Byte 1 Name Control Function Type 0 1 Default
Bit 7
SSENRB1 SS Enable Readback Bit1
R
Latch
Bit 6
SSENRB1 SS Enable Readback Bit0
R
Latch
Bit 5
SSEN_SWCNTRL Enable SW control of SS RW SS control locked
Values in B1[4:3]
control SS amount.
0
Bit 4
SSENSW1 SS Enable Software Ctl Bit1
RW
1
0
Bit 3
SSENSW0 SS Enable Software Ctl Bit0
RW
1
0
Bit 2
1
Bit 1
AMPLITUDE 1 RW 00 = 0.6V 01 = 0.7V 1
Bit 0
AMPLITUDE 0 RW 10= 0.8V 11 = 0.9V 0
1. B1[5] must be set to a 1 for these bits to have any effect on the part.
SMBus Table: DIF Slew Rate Control Register
Byte 2 Name Control Function Type 0 1 Default
Bit 7
1
Bit 6
1
Bit 5
1
Bit 4
1
Bit 3
SLEWRATESEL DIF3 Adjust Slew Rate of DIF3 RW 2.0V/ns 3.0V/ns 1
Bit 2
SLEWRATESEL DIF2 Adjust Slew Rate of DIF2 RW 2.0V/ns 3.0V/ns 1
Bit 1
SLEWRATESEL DIF1 Adjust Slew Rate of DIF3 RW 2.0V/ns 3.0V/ns 1
Bit 0
SLEWRATESEL DIF0 Adjust Slew Rate of DIF1 RW 2.0V/ns 3.0V/ns 1
SMBus Table: REF Control Register
Byte 3 Name Control Function Type 0 1 Default
Bit 7
RW 00 = 0.9V/ns 01 =1.3V/ns 0
Bit 6
RW 10 = 1.6V/ns 11 = 1.8V/ns 1
Bit 5
REF Power Down Function Wake-on-Lan Enable for REF RW
Down
0
Bit 4
REF OE REF Output Enable RW Low Enabled 1
Bit 3
1
Bit 2
1
Bit 1
1
Bit 0
1
Byte 4 is reserved and reads back 'hFF'.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
00' = SS Off, '01' = -0.25% SS,
'10' = Reserved, '11'= -0.5% SS
00' for SS_EN_tri = 0, '01' for SS_EN_tri
= 'M', '11 for SS_EN_tri = '1'
Reserved
