ADM1030
http://onsemi.com
4
Table 4. ELECTRICAL CHARACTERISTICS (T
A
= T
MIN
to T
MAX
, V
CC
= V
MIN
to V
MAX
, unless otherwise noted. (Note 1))
Parameter UnitMaxTypMinTest Conditions/Comments
SERIAL BUS DIGITAL INPUTS (SCL, SDA)
Input High Voltage, V
IH
2.1 − − V
Input Low Voltage, V
IL
− − 0.8 V
Hysteresis − 500 − mV
FAN RPM-TO-DIGITAL CONVERTER
Accuracy
60C T
A
100C − − 6 %
Resolution − − 8 Bits
TACH Nominal Input RPM Divisor N = 1, Fan Count = 153
Divisor N = 2, Fan Count = 153
Divisor N = 4, Fan Count = 153
Divisor N = 8, Fan Count = 153
−
−
−
−
4400
2200
1100
550
−
−
−
−
RPM
Conversion Cycle Time − 637 − ms
SERIAL BUS TIMING (Note 3)
Clock Frequency, f
SCLK
See Figure 2 for All Parameters. 10 − 100 kHz
Glitch Immunity, t
SW
− 50 − ns
Bus Free Time, t
BUF
4.7 − −
ms
Start Setup Time, t
SU;
STA
4.7 − −
ms
Start Hold Time, t
HD;
STA
4.0 − −
ms
Stop Condition Setup Time, t
SU;
STO
4.0 − −
ms
SCL Low Time, t
LOW
1.3 − −
ms
SCL High Time, t
HIGH
4.0 − 50
ms
SCL, SDA Rise Time, t
R
− − 1,000 ns
SCL, SDA Fall Time, t
F
− − 300 ns
Data Setup Time, t
SU;
DAT
250 − − ns
Data Hold Time, t
HD;
DAT
300 − − ns
1. Typicals are at T
A
= 25C and represent the most likely parametric norm. Shutdown current typ is measured with V
CC
= 3.3 V.
2. ADD is a three-state input that may be pulled high, low or left open-circuit.
3. Timing specifications are tested at logic levels of V
IL
= 0.8 V for a falling edge and V
IH
= 2.1 V for a rising edge.
NOTE: Specifications subject to change without notice.
Figure 2. Serial Bus Timing Diagram
P
S
t
SU; DAT
t
HIGH
t
F
t
HD; DAT
t
R
t
LOW
t
SU; STO
PS
SCL
SDA
t
BUF
t
HD; STA
t
HD; STA
t
SU; STA
