ADM1030
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7
General Description
The ADM1030 is a temperature monitor and PWM fan
controller for microprocessor-based systems. The device
communicates with the system via a serial System
Management Bus. The serial bus controller has a hardwired
address pin for device selection (Pin 13), a serial data line for
reading and writing addresses and data (Pin 15), and an
input line for the serial clock (Pin 16). All control and
programming functions of the ADM1030 are performed
over the serial bus. The device also supports the SMBus
Alert Response Address (ARA) function.
Internal Registers of the ADM1030
A brief description of the ADM1030’s principal internal
registers is given below. More detailed information on the
function of each register is given in Table 16 to Table 30.
Configuration Register
Provides control and configuration of various functions
on the device.
Address Pointer Register
This register contains the address that selects one of the
other internal registers. When writing to the ADM1030, the
first byte of data is always a register address, which is written
to the Address Pointer Register.
Status Registers
These registers provide status of each limit comparison.
Value and Limit Registers
The results of temperature and fan speed measurements
are stored in these registers, along with their limit values.
Fan Speed Config Register
This register is used to program the PWM duty cycle for
the fan.
Offset Registers
Allows the temperature channel readings to be offset by
a 5-bit two’s complement value written to these registers.
These values will automatically be added to the temperature
values (or subtracted from if negative). This allows the
systems designer to optimize the system if required, by
adding or subtracting up to 15C from a temperature
reading.
Fan Characteristics Register
This register is used to select the spin-up time, PWM
frequency, and speed range for the fan used.
THERM Limit Registers
These registers contain the temperature values at which
THERM
will be asserted.
T
MIN
/T
RANGE
Registers
These registers are read/write registers that hold the
minimum temperature value below which the fan will not
run when the device is in Automatic Fan Speed Control
Mode. These registers also hold the values defining the
range over that auto fan control will be provided, and hence
determines the temperature at which the fan will run at full
speed.
Serial Bus Interface
Control of the ADM1030 is carried out via the SMBus.
The ADM1030 is connected to this bus as a slave device,
under the control of a master device, e.g., the 810 chipset.
The ADM1030 has a 7-bit serial bus address. When the
device is powered up, it will do so with a default serial bus
address. The five MSBs of the address are set to 01011, the
two LSBs are determined by the logical state of Pin 13
(ADD). This is a three-state input that can be grounded,
connected to V
CC
, or left open-circuit to give three different
addresses. The state of the ADD pin is only sampled at
power-up, so changing ADD with power on will have no
effect until the device is powered off, then on again.
Table 5. ADD PIN TRUTH TABLE
ADD Pin A1 A0
GND 0 0
No Connect 1 0
V
CC
0 1
If ADD is left open-circuit, the default address will be
0101110.
The facility to make hardwired changes at the ADD pin
allows the user to avoid conflicts with other devices sharing
the same serial bus, for example, if more than one ADM1030
is used in a system.
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a
START condition, defined as a high-to-low
transition on the serial data line SDA while the
serial clock line SCL remains high. This indicates
that an address/data stream will follow. All slave
peripherals connected to the serial bus respond to
the START condition, and shift in the next 8 bits,
consisting of a 7-bit address (MSB first) plus an
R/W
bit that determines the direction of the data
transfer, i.e., whether data will be written to or
read from the slave device.
The peripheral whose address corresponds to the
transmitted address responds by pulling the data
line low during the low period before the ninth
clock pulse, known as the Acknowledge Bit. All
other devices on the bus now remain idle while the
selected device waits for data to be read from or
written to it. If the R/W
bit is a 0, the master will
write to the slave device. If the R/W
bit is a 1, the
master will read from the slave device.
2. Data is sent over the serial bus in sequences of
nine clock pulses, eight bits of data followed by an
Acknowledge Bit from the slave device.
Transitions on the data line must occur during the
low period of the clock signal and remain stable
ADM1030
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during the high period, as a low-to-high transition
when the clock is high may be interpreted as a
STOP signal. The number of data bytes that can be
transmitted over the serial bus in a single READ or
WRITE operation is limited only by what the
master and slave devices can handle.
3. When all data bytes have been read or written,
stop conditions are established. In WRITE mode,
the master will pull the data line high during the
tenth clock pulse to assert a STOP condition. In
READ mode, the master device will override the
acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse.
This is known as No Acknowledge. The master
will then take the data line low during the low
period before the tenth clock pulse, then high
during the tenth clock pulse to assert a STOP
condition.
Any number of bytes of data may be transferred over the
serial bus in one operation, but it is not possible to mix read
and write in one operation, because the type of operation is
determined at the beginning and cannot subsequently be
changed without starting a new operation.
In the case of the ADM1030, write operations contain
either one or two bytes, and read operations contain one
byte, and perform the following functions.
To write data to one of the device data registers or read
data from it, the Address Pointer Register must be set so that
the correct data register is addressed; data can then be
written into that register or read from it. The first byte of a
write operation always contains an address that is stored in
the Address Pointer Register. If data is to be written to the
device, then the write operation contains a second data byte
that is written to the register selected by the address pointer
register.
This is illustrated in Figure 15. The device address is sent
over the bus followed by R/W
set to 0. This is followed by
two data bytes. The first data byte is the address of the
internal data register to be written to, which is stored in the
Address Pointer Register. The second data byte is the data to
be written to the internal data register.
When reading data from a register there are two
possibilities:
1. If the ADM1030’s Address Pointer Register value
is unknown or not the desired value, it is first
necessary to set it to the correct value before data
can be read from the desired data register. This is
done by performing a write to the ADM1030 as
before, but only the data byte containing the
register address is sent, as data is not to be written
to the register. This is shown in Figure 16.
A read operation is then performed consisting of
the serial bus address, R/W
bit set to 1, followed
by the data byte read from the data register. This is
shown in Figure 17.
2. If the Address Pointer Register is known to be
already at the desired address, data can be read
from the corresponding data register without first
writing to the Address Pointer Register, so
Figure 16 can be omitted.
NOTES:
1. Although it is possible to read a data byte from a data
register without first writing to the Address Pointer Register,
if the Address Pointer Register is already at the correct
value, it is not possible to write data to a register without
writing to the Address Pointer Register, because the first
data byte of a write is always written to the Address Pointer
Register.
2. In Figures 15 to 17, the serial bus address is shown as the
default value 01011(A1)(A0), where A1 and A0 are set by
the three-state ADD pin.
3. The ADM1030 also supports the Read Byte protocol, as
described in the System Management Bus specification.
Figure 15. Writing a Register Address to the Address Pointer Register,
then Writing Data to the Selected Register
R/W
0
SCL
SDA
10
1
1
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADM1030
START BY
MASTER
191
ACK. BY
ADM1030
9
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADM1030
STOP BY
MASTER
1
9
SCL (CONTINUED)
SDA (CONTINUED)
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
FRAME 3
DATA BYTE
ADM1030
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Figure 16. Writing to the Address Pointer Register Only
0
SCL
SDA
10
1
1
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADM1030
START BY
MASTER
19
1
ACK. BY
ADM1030
9
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
R/W
Figure 17. Reading Data from a Previously Selected Register
SCL
SDA
D7
D6
D5
D4
D3
D2
D1
D0
NO ACK.
BY MASTER
START BY
MASTER
9
1
ACK. BY
ADM1030
9
STOP BY
MASTER
0
1
0
1
1
A1 A0
1
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE FROM ADM1030
R/W
Alert Response Address
Alert Response Address (ARA) is a feature of SMBus
devices that allows an interrupting device to identify itself
to the host when multiple devices exist on the same bus.
The INT
output can be used as an interrupt output or can
be used as an SMBALERT
. One or more INT outputs can be
connected to a common SMBALERT
line connected to the
master. If a device’s INT
line goes low, the following
procedure occurs:
1. SMBALERT
pulled low.
2. Master initiates a read operation and sends the
Alert Response Address (ARA = 0001 100). This
is a general call address that must not be used as a
specific device address.
3. The device whose INT
output is low responds to
the Alert Response Address, and the master reads
its device address. The address of the device is
now known and can be interrogated in the usual
way.
4. If more than one device’s INT
output is low, the
one with the lowest device address will have
priority, in accordance with normal SMBus
arbitration.
5. Once the ADM1030 has responded to the Alert
Response Address, it will reset its INT
output;
however, if the error condition that caused the
interrupt persists, INT
will be reasserted on the
next monitoring cycle.
Temperature Measurement System
Internal Temperature Measurement
The ADM1030 contains an on-chip bandgap temperature
sensor. The on-chip ADC performs conversions on the
output of this sensor and outputs the temperature data in
10-bit two’s complement format. The resolution of the local
temperature sensor is 0.25C. The format of the temperature
data is shown in Table 6.
External Temperature Measurement
The ADM1030 can measure the temperature of an
external diode sensor or diode-connected transistor,
connected to Pins 9 and 10.
These pins are a dedicated temperature input channel. The
function of Pin 7 is as a THERM
input/output and is used to
flag overtemperature conditions.
The forward voltage of a diode or diode-connected
transistor, operated at a constant current, exhibits a negative
temperature coefficient of about –2 mV/C. Unfortunately,
the absolute value of V
BE
, varies from device to device, and
individual calibration is required to null this out, so the
technique is unsuitable for mass production.
The technique used in the ADM1030 is to measure the
change in V
BE
when the device is operated at two different
currents.
This is given by:
(eq. 1)
DV
BE
+ KTńq ln(N)
where:
K is Boltzmann’s constant
q is charge on the carrier
T is absolute temperature in Kelvins
N is ratio of the two currents
Figure 18 shows the input signal conditioning used to
measure the output of an external temperature sensor. This
figure shows the external sensor as a substrate transistor,
provided for temperature monitoring on some
microprocessors, but it could equally well be a discrete
transistor.

ADM1030ARQZ

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Motor / Motion / Ignition Controllers & Drivers TDM & PWM FAN CNTRLRS IC
Lifecycle:
New from this manufacturer.
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