4
Typical Application/Operation
Introduction to Fault Detection and Protection
The power stage of a typical three-phase inverter is susceptible to several types of failures, most of which are
potentially destructive to the power IGBTs. These failure modes can be grouped into four basic categories: phase and
rail supply short circuits due to user misconnect or bad wiring, control signal failures due to noise or computational
errors, overload conditions induced by the load, and component failures in the gate-drive circuitry. Under any of these
fault conditions, the current through the IGBTs can increase rapidly, causing excessive power dissipation and heating.
The IGBTs become damaged when the current load approaches the saturation current of the device, and the
collector-to-emitter voltage rises above the saturation voltage level. The drastically increased power dissipation
quickly overheats the power device and destroys it. To prevent damage to the drive, fault protection must be
implemented to reduce or turn-o the overcurrent during a fault condition.
A circuit providing fast local-fault detection and shutdown is an ideal solution, but the number of required
components, board space consumed, cost, and complexity have, until now, limited its use to high performance drives.
The features this circuit must have include high speed, low cost, low resolution, low power dissipation, and small size.
The ACPL-344JT satises these criteria by combining a high-speed, high-output current driver, high-voltage optical
isolation between the input and output, local IGBT desaturation detection and shut down, and optically isolated fault
and UVLO-status feedback signal into a single 16-pin surface-mount package.
The fault-detection method adopted in the ACPL-344JT monitors the saturation (collector) voltage of the IGBT and
triggers a local-fault shutdown sequence if the collector voltage exceeds a predetermined threshold. A small gate-
discharge device slowly reduces the high short-circuit IGBT current to prevent damaging voltage spikes. Before the
dissipated energy can reach destructive levels, the IGBT is shut o. During the o state of the IGBT, the fault detect
circuitry is simply disabled to prevent false ‘fault’ signals.
The alternative protection scheme of measuring IGBT current to prevent desaturation is eective if the short-circuit
capability of the power device is known, but this method will fail if the gate-drive voltage decreases enough to only
partially turn on the IGBT. By directly measuring the collector voltage, the ACPL-344JT limits the power dissipation
in the IGBT even with insucient gate-drive voltage. Another more subtle advantage of the desaturation detection
method is that power dissipation in the IGBT is monitored, while the current sense method relies on a preset current
threshold to predict the safe limit of operation. Therefore, an overly- conservative overcurrent threshold is not required
to protect the IGBT.
Recommended Application Circuit
The ACPL-344JT has non-inverting gate-control inputs, and an open-collector fault and UVLO outputs suitable for
wired-OR applications.
The recommended application circuit shown in Figure 3 shows a typical gate-drive implementation using the ACPL-
344JT.
The two supply bypass capacitors (1.0 μF minimum) provide the large transient currents necessary during a switch-
ing transition. The Desat diode and 220 pF blanking capacitor are the necessary external components for the fault
detection circuitry. The gate resistor (10Ω) serves to limit gate-charge current and indirectly control the IGBT collector
voltage rise-and-fall times. The open-collector fault and UVLO outputs have a passive 10 kΩ pull-up resistor and a 330
pF ltering capacitor.
5
DESAT Fault Detection Blanking Time
The DESAT fault detection circuitry must remain disabled for a short time period following the turn-on of the IGBT to
allow the collector voltage to fall below the DESAT threshold. This time period, called the total DESAT blanking time, is
controlled by the both internal DESAT blanking time t
DESAT(BLANKING)
(Figure 6) and external blanking time, determined
by internal charge current, the DESAT voltage threshold, and the external DESAT capacitor.
The total blanking time is calculated in terms of internal blanking time (t
DESAT(BLANKING)
), external capacitance (C
BLANK
),
FAULT threshold voltage (V
DESAT
), and DESAT charge current (I
CHG
):
t
BLANK
= t
DESAT(BLANKING)
+ C
BLANK
× V
DESAT
/I
CHG
Figure 3. Typical gate-drive circuit with Desat current sensing using ACPL-344JT.
Description of Gate Driver and Miller Clamping
The gate driver is directly controlled by the LED current. When LED current is driven HIGH, the output of ACPL-344JT
is capable of delivering 2.5A sourcing current to drive the IGBT’s gate. While LED is switched o, the gate driver can
provide 2.5A sinking current to switch the gate o fast. An additional Miller clamping pull-down transistor is activated
when output voltage reaches about 2V with respect to V
EE2
to provide a low impedance path to Miller Current, as
shown in Figure 4.
Figure 4. Gate-Drive Signal Behavior.
+ 5V
16
15
14
13
12
11
10
9
LED2+
VCC2
VEE2
VO
VE
1
2
3
4
5
6
7
8
NC
VEE1
AN
CA
/FAULT
/UVLO
DESAT
VCC1
NC
SSD/CLAMP
10 kΩ
10 kΩ
10Ω
330 pF
330 pF
1 µF
1 µF
130Ω
220 pF
ACPL-344JT
VEE2
VEE2
10 µF
10 µF
130Ω
VCC1
VCC2
µC
1 kΩ
I
F
V
O
V
GATE
6
t
DESAT (/FAULT)
t
t
DESAT (BLANKING)
t
DESAT (90%)
I
F
V
DESAT
V
/FAULT
V
O
state
SSD/Clamp
State
V
GATE
Hi-Z
Clamp
Clamp
t
DESAT (MUTE)
Clamp
V
DESAT_TH
SSD
Hi-Z
Hi-Z
Hi-Z
DESAT (RESET)
Description of Under-Voltage Lockout
Insucient gate voltage to IGBT can increase turn-on resistance of IGBT, resulting in large power loss and IGBT damage
due to high heat dissipation. ACPL-344JT monitors the output power supply constantly. When output power supply is
lower than under-voltage lockout (UVLO) threshold, gate-driver output shuts o to protect IGBT from low voltage bias.
During power-up, the UVLO feature forces the gate driver output LOW to prevent unwanted turn-on at lower voltage.
Figure 5. Circuit Behaviors at Power up and Power down.
Description of Operation During Overcurrent Condition
1. DESAT terminal monitors IGBT’s V
CE
voltage.
2. When the voltage on the DESAT terminal exceeds 7V, the output voltage (V
OUT
) to IGBT gate goes to Hi-Z state and
the SSD/CLAMP output is slowly lowered.
3. FAULT output goes LOW, notifying the microcontroller of the fault condition.
4. Microcontroller takes appropriate action.
5. When t
DESAT(MUTE)
expires, LED input must be kept LOW for t
DESAT(RESET)
before the fault condition is cleared. FAULT
status returns to HIGH and SSD/CLAMP output returns to Hi-Z state.
6. Output (V
OUT
) starts to respond to LED input after the fault condition is cleared.
Figure 6. Circuit Behaviors During Overcurrent Event.
V
CC1
V
CC2
LED I
F
V
O
/FAULT
/UVLO
t
UVLO_ON
t
UVLO_OFF
t
PHL_UVLO
t
PLH_UVLO
V
UVLO+
V
UVLO
-

ACPL-344JT-500E

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
High Speed Optocouplers Auto Optocoupler
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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