CAT15008, CAT15016
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11
READ OPERATIONS
Read from Memory Array
To read from memory, the host sends a READ instruction
followed by an 16−bit address (see Table 11 for the number
of significant address bits).
After receiving the last address bit, the CAT15008/16 will
respond by shifting out data on the SO pin (as shown in
Figure 10). Sequentially stored data can be read out by
simply continuing to run the clock. The internal address
pointer is automatically incremented to the next higher
address as data is shifted out. After reaching the highest
memory address, the address counter “rolls over” to the
lowest memory address, and the read cycle can be continued
indefinitely. The read operation is terminated by taking CS
high.
Read Status Register
To read the status register, the host simply sends a RDSR
command. After receiving the last bit of the command, the
CAT15008/16 will shift out the contents of the status register
on the SO pin (Figure 11). The status register may be read
at any time, including during an internal write cycle.
Figure 10. READ Timing
SCK
SI
SO
0
BYTE ADDRESS*
0
7 6 5 4 3 2 10
CS
DATA OUT
MSB
HIGH IMPEDANCE
A
N
A
0
OPCODE
12345 67 8910 2021222324252627282930
0000011
Notes: * Please check the Byte Address Table (Table 11)
Dashed Line = mode (1, 1)−−−−−
Figure 11. RDSR Timing
09
SCK
SI
DATA OUT
MSB
HIGH IMPEDANCE
OPCODE
SO
7 6
5
4 3 2 1 0
CS
0
0
0
1 2 3 4 5 6 7 8 10 11 12 13 14
00101
Note: Dashed Line = mode (1, 1)−−−−−
