9
Electrical Specications
Over recommended temperature (T
A
= 0˚C to +70˚C) unless otherwise specied.
Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note
Logic High I
OH
0.5 nA T
A
= 25°C, I
F
= 0 mA 5
Output Current V
O
= V
CC
= 5.5 V
50 µA I
F
= 0 mA
V
O
= V
CC
= 5.5 V
Logic High I
CCH
0.05 4 µA I
F
= 0 mA
Supply Current V
O
= Open, V
CC
= 5.5 V
Input Reverse V
R
5 V I
F
= 10 µA, T
A
= 25°C
Breakdown Voltage
Input Capacitance C
IN
60 pF f = 1 MHz, V
F
= 0 V
Input-Output I
I–O
1.0 µA 45% Relative Humidity, 6
Insulation Leakage t = 5s, V
I–O
= 3000 Vdc,
Current T
A
= 25°C
Resistance R
I–O
10
12
Ω V
I–O
= 500 Vdc 6
(Input–Output)
Capacitance C
I–O
0.6 pF f = 1 MHz 6
(Input–Output)
*All typicals at 25˚C.
Notes:
5. Current Transfer Ratio is dened as the ratio of output collector current, I/O, to the forward LED input current, I
F
, times 100%.
6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
7. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dV
CM
/dt on the leading edge of the common mode
pulse V
CM
, to assure that the output will remain in a Logic High state (i.e., V
O
> 2.0 V). Common mode transient immunity in Logic Low level is
the maximum tolerable (negative) dV
CM
/dt on the trailing edge of the common mode pulse signal, V
CM
, to assure that the output will remain
in a Logic Low state (i.e., V
O
< 0.8 V).
8. The 7.5 k load represents 1 LSTTL until load of 0.36 mA and a 20 kΩ pull-up resistor.
9. The 4.7 k load represents 1 LSTTL unit load of 0.36 mA and an 8.2 kΩ pull-up resistor.
