AD7792/AD7793
Rev. B | Page 10 of 32
Pin No. Mnemonic Description
15
DOUT/
RDY Serial Data Output/Data Ready Output. DOUT/RDY serves a dual purpose. It functions as a serial data output
pin to access the output shift register of the ADC. The output shift register can contain data from any of the
on-chip data or control registers. In addition, DOUT/
RDY operates as a data ready pin, going low to indicate
the completion of a conversion. If the data is not read after the conversion, the pin goes high before the
next update occurs.
The DOUT/
RDY falling edge can be used as an interrupt to a processor, indicating that valid data is available.
With an external serial clock, the data can be read using the DOUT/RDY pin. With CS low, the data/control
word information is placed on the DOUT/
RDY pin on the SCLK falling edge and is valid on the SCLK
rising edge.
16 DIN
Serial Data Input. This serial data input is to the input shift register on the ADC. Data in this shift register is
transferred to the control registers within the ADC; the register selection bits of the communications
register identify the appropriate register.
AD7792/AD7793
Rev. B | Page 11 of 32
OUTPUT NOISE AND RESOLUTION SPECIFICATIONS
EXTERNAL REFERENCE
Tabl e 5 shows the output rms noise of the AD7792/AD7793 for
some of the update rates and gain settings. The numbers given
are for the bipolar input range with an external 2.5 V reference.
These numbers are typical and are generated with a differential
input voltage of 0 V.
Table 6 and Table 7 show the effective
resolution, with the output peak-to-peak (p-p) resolution
shown in parentheses for the AD7793 and AD7792, respectively.
It is important to note that the effective resolution is calculated
using the rms noise, while the p-p resolution is based on the p-p
noise. The p-p resolution represents the resolution for which
there is no code flicker. These numbers are typical and are
rounded to the nearest LSB.
Table 5. Output RMS Noise (μV) vs. Gain and Output Update Rate for the AD7792 and AD7793 Using an External 2.5 V Reference
Update Rate (Hz) Gain of 1 Gain of 2 Gain of 4 Gain of 8 Gain of 16 Gain of 32 Gain of 64 Gain of 128
4.17 0.64 0.6 0.29 0.22 0.1 0.065 0.039 0.041
8.33 1.04 0.96 0.38 0.26 0.13 0.078 0.057 0.055
16.7 1.55 1.45 0.54 0.36 0.18 0.11 0.087 0.086
33.2 2.3 2.13 0.74 0.5 0.23 0.17 0.124 0.118
62 2.95 2.85 0.92 0.58 0.29 0.2 0.153 0.144
123 4.89 4.74 1.49 1 0.48 0.32 0.265 0.283
242 11.76 9.5 4.02 1.96 0.88 0.45 0.379 0.397
470 11.33 9.44 3.07 1.79 0.99 0.63 0.568 0.593
Table 6. Typical Resolution (Bits) vs. Gain and Output Update Rate for the AD7793 Using an External 2.5 V Reference
Update Rate (Hz) Gain of 1 Gain of 2 Gain of 4 Gain of 8 Gain of 16 Gain of 32 Gain of 64 Gain of 128
4.17 23 (20.5) 22 (19.5) 22 (19.5) 21.5 (19) 21.5 (19) 21 (18.5) 21 (18.5) 20 (17.5)
8.33 22 (19.5) 21.5 (19) 21.5 (19) 21 (18.5) 21 (18.5) 21 (18.5) 20.5 (18) 19.5 (17)
16.7 21.5 (19) 20.5 (18) 21 (18.5) 20.5 (18) 20.5 (18) 20.5 (18) 20 (17.5) 19 (16.5)
33.2 21 (18.5) 20 (17.5) 20.5 (18) 20 (17.5) 20.5 (18) 20 (17.5) 19 (16.5) 18.5 (16)
62 20.5 (18) 19.5 (17) 20.5 (18) 20 (17.5) 20 (17.5) 19.5 (17) 19 (16.5) 18 (15.5)
123 20 (17.5) 19 (16.5) 19.5 (17) 19 (16.5) 19.5 (17) 19 (16.5) 18 (15.5) 17 (14.5)
242 18.5 (16) 18 (15.5) 18 (15.5) 18 (15.5) 18.5 (16) 18.5 (16) 17.5 (15) 16.5 (14)
470 18.5 (16) 18 (15.5) 18.5 (16) 18.5 (16) 18 (15.5) 18 (15.5) 17 (14.5) 16 (13.5)
Table 7. Typical Resolution (Bits) vs. Gain and Output Update Rate for the AD7792 Using an External 2.5 V Reference
Update Rate (Hz) Gain of 1 Gain of 2 Gain of 4 Gain of 8 Gain of 16 Gain of 32 Gain of 64 Gain of 128
4.17 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16)
8.33 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16)
16.7 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16)
33.2 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16)
62 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (15.5)
123 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 165 (15.5) 16 (14.5)
242 16 (16) 16 (15.5) 16 (15.5) 16 (15.5) 16 (16) 16 (16) 16 (15) 16 (14)
470 16 (16) 16 (15.5) 16 (16) 16 (16) 16 (15.5) 16 (15.5) 16 (14.5) 15.5 (13.5)
AD7792/AD7793
Rev. B | Page 12 of 32
INTERNAL REFERENCE
Tabl e 8 shows the output rms noise of the AD7792/AD7793 for
some of the update rates and gain settings. The numbers given
are for the bipolar input range with the internal 1.17 V
reference. These numbers are typical and are generated with a
differential input voltage of 0 V.
Tabl e 9 and Table 10 show the
effective resolution, with the output peak-to-peak (p-p)
resolution given in parentheses for the AD7793 and AD7792,
respectively. It is important to note that the effective resolution
is calculated using the rms noise, while the p-p resolution is
calculated based on p-p noise. The p-p resolution represents the
resolution for which there is no code flicker. These numbers are
typical and are rounded to the nearest LSB.
Table 8. Output RMS Noise (μV) vs. Gain and Output Update Rate for the AD7792 and AD7793 Using the Internal Reference
Update Rate (Hz) Gain of 1 Gain of 2 Gain of 4 Gain of 8 Gain of 16 Gain of 32 Gain of 64 Gain of 128
4.17 0.81 0.67 0.32 0.2 0.13 0.065 0.04 0.039
8.33 1.18 1.11 0.41 0.25 0.16 0.078 0.058 0.059
16.7 1.96 1.72 0.55 0.36 0.25 0.11 0.088 0.088
33.2 2.99 2.48 0.83 0.48 0.33 0.17 0.13 0.12
62 3.6 3.25 1.03 0.65 0.46 0.2 0.15 0.15
123 5.83 5.01 1.69 0.96 0.67 0.32 0.25 0.26
242 11.22 8.64 2.69 1.9 1.04 0.45 0.35 0.34
470 12.46 10.58 4.58 2 1.27 0.63 0.50 0.49
Table 9. Typical Resolution (Bits) vs. Gain and Output Update Rate for the AD7793 Using the Internal Reference
Update Rate (Hz) Gain of 1 Gain of 2 Gain of 4 Gain of 8 Gain of 16 Gain of 32 Gain of 64 Gain of 128
4.17 21.5 (19) 20.5 (18) 21 (18.5) 20.5 (18) 20 (17.5) 20 (17.5) 20 (17.5) 19 (16.5)
8.33 21 (18.5) 20 (17.5) 20.5 (18) 20 (17.5) 20 (17.5) 20 (17.5) 19 (16.5) 18 (15.5)
16.7 20 (17.5) 19.5 (17) 20 (17.5) 19.5 (17) 19 (16.5) 19.5 (17) 18.5 (16) 17.5 (15)
33.2 19.5 (17) 19 (16.5) 19.5 (17) 19 (16.5) 19 (16.5) 18.5 (16) 18 (15.5) 17 (14.5)
62 19.5 (17) 18.5 (16) 19 (16.5) 19 (16.5) 18.5 (16) 18.5 (16) 18 (15.5) 17 (14.5)
123 18.5 (16) 18 (15.5) 18.5 (16) 18 (15.5) 17.5 (15) 18 (15.5) 17 (14.5) 16 (13.5)
242 17.5 (15) 17 (14.5) 17.5 (15) 17 (14.5) 17 (14.5) 17.5 (15) 16.5 (14) 15.5 (13)
470 17.5 (15) 17 (14.5) 17 (14.5) 17 (14.5) 17 (14.5) 17 (14.5) 16 (13.5) 15 (12.5)
Table 10. Typical Resolution (Bits) vs. Gain and Output Update Rate for the AD7792 Using the Internal Reference
Update Rate (Hz) Gain of 1 Gain of 2 Gain of 4 Gain of 8 Gain of 16 Gain of 32 Gain of 64 Gain of 128
4.17 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16)
8.33 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (15.5)
16.7 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (15)
33.2 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (15.5) 16 (14.5)
62 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (16) 16 (15.5) 16 (14.5)
123 16 (16) 16 (15.5) 16 (16) 16 (15.5) 16 (15) 16 (15.5) 16 (14.5) 15.5 (13.5)
242 16 (15) 16 (14.5) 16 (15) 16 (14.5) 16 (14.5) 16 (15) 16 (14) 15 (13)
470 16 (15) 16 (14.5) 16 (14.5) 16 (14.5) 16 (14.5) 16 (14.5) 15.5 (13.5) 14.5 (12.5)

AD7793BRUZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 3Ch Lo Noise Lo Pwr 24B w/ On-Chip Ref
Lifecycle:
New from this manufacturer.
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