BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK
Rev.5.0_01
S-8254A Series
Seiko Instruments Inc.
11
4. 0 V Battery Charge Starting Charger Voltage (Product with 0 V Battery Charge Function), 0 V
Battery Charge Inhibition Battery Voltage (Product with 0 V Battery Charge Inhibition Function)
(Test circuit 4)
Ether the 0 V battery charge starting charger voltage or the 0 V battery charge inhibition battery voltage is
applied to each product according to the 0 V battery charging function.
4.1 0 V Battery Charge Starting Battery Charger Voltage (V
0CHA
) (Product with 0 V Battery Charge
Function)
The starting condition is V1 = V2 = V3 = V4 = 0 V for a product in which 0 V battery charging is
available. The COP pin voltage should be lower than V
0CHA
max. − 1 V when the VMP pin voltage
V
VMP
= V
0CHA
max.
4.2 0 V Battery Charge Inhibition Battery Voltage (V
0INH
) (Product with 0 V Battery Charge
Inhibition Function)
The starting condition is V1 = V2 = V3 = V4 = V
0INH
for a product in which 0 V battery charging is
inhibited. The COP pin voltage should be higher than V
VMP
− 1 V when the VMP pin voltage V
VMP
=
24 V.
5. Resistance between VMP and VDD, Resistance between VMP and VSS, VC1 Pin Current, VC2 Pin
Current, VC3 Pin Current, VC4 Pin Current, CTL pin Current “H”, CTL Pin Current “L”, SEL Pin
Current “H”, SEL Pin Current “L”, COP Pin Leakage Current, COP Pin Sink Current, DOP Pin
Source Current, DOP Pin Sink Current
(Test circuit 5)
V
VMP
= V
SEL
= V
DD
, V
INI
= V
CTL
= V
SS
, V1 = V2 = V3 = V4 = 3.5 V, and other pins left “open” (this status is
referred to as the initial status).
5.1 Resistance between VMP and VDD (R
VMD
)
The resistance between VMP and VDD (R
VMD
) is obtained from R
VMD
= V
DD
/ I
VMD
using the current
value of the VMP pin (I
VMD
) when V
VMP
is V
SS
after the initial status.
5.2 Resistance between VMP and VSS (R
VMS
)
The resistance between VMP and VSS (R
VMS
) is obtained from R
VMS
= V
DD
/ I
VMS
using the current
value of the VMP pin (I
VMS
) when V1 = V2 = V3 = V4 = 1.8 V after the initial status.
5.3 VC1 Pin Current (I
VC1
), VC2 Pin Current (I
VC2
), VC3 Pin Current (I
VC3
), VC4 Pin Current (I
VC4
)
At the initial status, the current that flows through the VC1 pin is the VC1 pin current (I
VC1
), the current
that flows through the VC2 pin is the VC2 pin current (I
VC2
), the current that flows through the VC3 pin
is the VC3 pin current (I
VC3
), and the current that flows through the VC4 pin is the VC4 pin current
(I
VC4
).
5.4 CTL pin Current “H” (I
CTLH
), CTL Pin Current “L” (I
CTLL
)
In the initial status, the current that flows through the CTL pin is the CTL pin current “L” (I
CTLL
), after
that, when V
CTL
= V
DD
, the current that flows through the CTL pin is the CTL pin current “H” (I
CTLH
).
5.5 SEL Pin Current “H” (I
SELH
), SEL Pin Current “L” (I
SELL
)
In the initial status, the current that flows through the SEL pin is the SEL pin current “H” (I
SELH
), after
that, when V
SEL
= V
SS
, the current that flows through the SEL pin is the SEL pin current “L” (I
SELL
).
