LT3507
20
3507fb
For more information www.linear.com/LT3507
is minimized by the exponential I-V characteristic of the
diodes, it does impose a finite amount of output voltage
deviation. Further, when channel 1’s output experiences
dynamic excursions (under load transient, for example),
channel 2 will be affected as well. Setting R6 to a value
that pushes the TRK/SS2 voltage to 1V at steady state will
eliminate these problems while providing near ratiometric
tracking.
The example shows channel 2 tracking channel 1, however
any channel may be set up to track any other channel.
If a capacitor is tied from the TRK/SS pin to ground, then
the internal pull-up current will generate a voltage ramp on
this pin. This results in a ramp at the output, limiting the
inductor current and therefore input current during start-up.
A good value for the soft-start capacitor is C
OUT
/10,000,
where C
OUT
is the value of the output capacitor.
MULTIPLE INPUT SUPPLIES
V
IN1
, V
IN2
and V
IN3
are independent and can be powered
with different voltages provided V
IN1
is present when V
IN2
or V
IN3
is present. Each supply must be bypassed as close
to the V
IN
pins as possible.
For applications requiring large inductors due to high V
IN
to V
OUT
ratios, a 2-stage step-down approach may reduce
inductor size by allowing an increase in frequency. A dual
step-down application steps down the input voltage (V
IN1
)
to the highest output voltage, then uses that voltage to
power the other outputs (V
IN2
and V
IN3
). V
OUT1
must be
able to provide enough current for its output plus the
input current at V
IN2
and V
IN3
when V
OUT2
and V
OUT3
are
at maximum load. The Typical Applications section shows
a 36V to 15V, 1.8V and 1.2V 2-stage converter using this
approach.
For applications with multiple voltages, the LT3507 can
accommodate input voltages as low as 3V on V
IN2
and
V
IN3
. This can be useful in applications regulating outputs
from a PCI Express bus, where the 12V input is power
applications inForMation
limited and the 3.3V input has power available to drive
other outputs. In this case, tie the 12V input to V
IN1
and
the 3.3V input to V
IN2
and V
IN3
.
LOW DROPOUT REGULATOR
The low dropout regulator comprises an error amp, loop
compensation and a base drive amp. It uses the same 0.8V
reference as the switching regulators. It requires an external
NPN pass transistor and 2.2µF of output capacitance for
stability. The internal compensation is stable with loads
up to 300mA.
The dropout characteristics will be determined by the pass
transistor. The collector-emitter saturation characteristics
will limit the dropout voltage. Table 4 lists some suitable
NPN transistors with their saturation specifications.
The base drive voltage has a maximum voltage of 5V.
This will limit the maximum output of the regulator to
5V – V
BESAT
where V
BESAT
is the base-emitter saturation
voltage of the pass transistor.
Table 4. NPN Pass Transistors and Saturation Characteristics
PART NUMBER V
CESAT
V
BESAT
I
C
(mA) I
B
(mA)
On Semiconductor
NSS30071 0.25 0.85 500 5
NSS30101 0.2 0.85 1000 10
Fairchild
KSC3265 0.4 500 20
The LDO is always on when any of the switcher channels
is on. The LDO may be shut down if it is unused by pull-
ing the FB4 pin up with a 30µA current source. The FB4
pin will clamp at about
1.25V
and the LDO will shut off
reducing power consumption. This pull-up can be sourced
from one of the LT3507 outputs provided that channel is
always on when the other channels are on.
The output stage of the LDO will drive the NPN base from
the BIAS voltage if it is at least 0.8V above the LDO DRIVE
voltage.
