9EPRS475BGLFT Datasheet 9EPRS475BGLF, 9EPRS475BGLFT | P10-P12

Integrated

Circuit

Systems, Inc.

ICS9EPRS475

Datasheet

1615—08/19/09

SMBus Table: Reserved

Byte 10 Name Control Function Type 0 1 Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SMBus Table: Byte Count Register

Byte 11 Name Control Function Type 0 1 Default

Bit 7

Bit 6

Bit 5

BC5 Byte Count bit 5 (MSB) RW 0

Bit 4

BC4 Byte Count bit 4 RW 0

Bit 3

BC3 Byte Count bit 3 RW 1

Bit 2

BC2 Byte Count bit 2 RW 1

Bit 1

BC1 Byte Count bit 1 RW 1

Bit 0

BC0 Byte Count bit 0 (LSB) RW 1

SMBus Table: M/N Programming Enable and I/O Vout Control Register

Byte 12 Name Control Function Type 0 1 Default

Bit 7

CPU M/N En CPU PLL M/N Prog. Enable RW M/N Prog. Disabled M/N Prog. Enabled 0

Bit 6

SRC M/N En SRC M/N Prog.Enable RW M/N Prog. Disabled M/N Prog. Enabled 0

Bit 5

SKIP_N_INC

Skip N Incrementing during CPU PLL

M/N Programming

RW N-Increment Bypass N-Increment 0

Bit 4

Bit 3

Bit 2

IO_VOUT2

IO Output Voltage Select (Most

Significant Bit)

RW 1

Bit 1

IO_VOUT1 IO Output Voltage Select RW 0

Bit 0

IO_VOUT0

IO Output Voltage Select (Least

Significant Bit)

RW 1

SMBus Table: Reserved Register

Byte 13 Name Control Function Type 0 1 Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SMBus Table: Reserved Register

Byte 14 Name Control Function Type 0 1 Default

Bit 7

CPU NDiv0 LSB N Divider Programming RW X

Bit 6

Bit 5

Bit 4

Bit 3

SB_SRCDiv3 RW 0000:/2 ; 0100:/4 1000:/8 ; 1100:/16 X

Bit 2

SB_SRCDiv2 RW 0001:/3 ; 0101:/6 1001:/12 ; 1101:/24 X

Bit 1

SB_SRCDiv1 RW 0010:/5 ; 0110:/10 1010:/20 ; 1110:/40 X

Bit 0

SB_SRCDiv0 RW 0011:/9 ; 0111:/18 1011:/36 ; 1111:/72 X

Reserved

SB_SRC Divider Ratio Programming

Bits from CPU PLL

Reserved

Byte 27 has the N Divider LSB (bit 0) for CPU

Reserved

Determines the number of bytes that are read

back from the device. Default is 0F hex.

Reserved

See Table 5: V_IO Selection

(Default is 0.8V)

Reserved

Integrated

Circuit

Systems, Inc.

ICS9EPRS475

Datasheet

1615—08/19/09

SMBus Table:Test Mode Register

Byte 15 Name Control Function Type 0 1 Default

Bit 7

Test_Md_Sel Selects Test Mode

Normal mode All ouputs are REF/N 0

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SMBus Table: CPU PLL Frequency Control Register

Byte 16 Name Control Function Type 0 1 Default

Bit 7

N Div2 N Divider Prog bit 2 RW X

Bit 6

N Div1 N Divider Prog bit 1 RW X

Bit 5

M Div5 RW X

Bit 4

M Div4 RW X

Bit 3

M Div3 RW X

Bit 2

M Div2 RW X

Bit 1

M Div1 RW X

Bit 0

M Div0 RW X

SMBus Table: CPU PLL Frequency Control Register

Byte 17 Name Control Function Type 0 1 Default

Bit 7

N Div10 RW

Bit 6

N Div9 RW X

Bit 5

N Div8 RW X

Bit 4

N Div7 RW X

Bit 3

N Div6 RW X

Bit 2

N Div5 RW X

Bit 1

N Div4 RW X

Bit 0

N Div3 RW X

SMBus Table: CPU PLL Spread Spectrum Control Register

Byte 18 Name Control Function Type 0 1 Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

SB_SRC_Ssel SB_SRC PLL Source Selection (MSB) RW 10 - N/A 11 - CPU PLL 0

Bit 2

ATIG_Ss el ATIGCLK PLL Source Selection RW SRC PLL FIX PLL 0

Bit 1

SRC_Ssel SRC PLL Source Selection RW SRC PLL FIX PLL 0

Bit 0

SB_SRC_Ssel SB_SRC PLL Source Selection (LSB) RW 00 - SRC PLL 01 - FIX PLL 0

SMBus Table: Reserved

Byte 19 Name Control Function Type 0 1 Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

The decimal representation of M and N Divider in

Byte 16 and 17 will configure the VCO frequency.

Default at power up = Byte 0 Rom table. See M/N

Caculation Tables for VCO frequency formulas.

M Divider Programming bits

N Divider Programming b(10:3)

The decimal representation of M and N Divider in

Byte 16 and 17 will configure the VCO frequency.

Default at power up = Byte 0 Rom table. See M/N

Caculation Tables for VCO frequency formulas.

Reserved

Integrated

Circuit

Systems, Inc.

ICS9EPRS475

Datasheet

1615—08/19/09

SMBUS Table: SRC spread enable

Byte 20 Name Control Function Type 0 1 Default

Bit 7

SRC_PLL_SS_Enable

Spread Spectrum Enable (SRC,

SB_SRC, ATIG)

RW Spread Off Spread On 0

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SMBUS Table: Reserved

Byte 21 Name Control Function Type 0 1 Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SMBUS Table: Reserved

Byte 22 Name Control Function Type 0 1 Default

Bit 7

ATIGDiv3 RW 0000:/2 ; 0100:/4 1000:/8 ; 1100:/16

Bit 6

ATIGDiv2 RW N/A ; 0101:/6 1001:/12 ; 1101:/24 X

Bit 5

ATIGDiv1 RW N/A ; 0110:/10 1010:/20 ; 1110:/40 X

Bit 4

ATIGDiv0 RW N/A ; 0111:/14 1011:/28 ; 1111:/56 X

Bit 3

SB_SRCDiv3 RW 0000:/2 ; 0100:/4 1000:/8 ; 1100:/16 X

Bit 2

SB_SRCDiv2 RW 0001:/3 ; 0101:/6 1001:/12 ; 1101:/24 X

Bit 1

SB_SRCDiv1 RW 0010:/5 ; 0110:/10 1010:/20 ; 1110:/40 X

Bit 0

SB_SRCDiv0 RW 0011:/7 ; 0111:/14 1011:/28 ; 1111:/56 X

SMBUS Table: SRC Spread Spectrum Control Register

Byte 23 Name Control Function Type 0 1 Default

Bit 7

SSP7 RW X

Bit 6

SSP6 RW X

Bit 5

SSP5 RW X

Bit 4

SSP4 RW X

Bit 3

SSP3 RW X

Bit 2

SSP2 RW X

Bit 1

SSP1 RW X

Bit 0

SSP0 RW X

SMBUS Table: SRC Spread Spectrum Control Register

Byte 24 Name Control Function Type 0 1 Default

Bit 7

SSP15 RW

Bit 6

SSP14 RW X

Bit 5

SSP13 RW X

Bit 4

SSP12 RW X

Bit 3

SSP11 RW X

Bit 2

SSP10 RW X

Bit 1

SSP9 RW X

Bit 0

SSP8 RW X

Spread Spectrum Programming

bit(15:8)

These bits set the SRC, the ATIG and SB_SRC

spread pecentages.Please contact ICS for the

appropriate values.

ATIG Divider Ratio Programming Bits

SB_SRC Divider Ratio Programming

Bits from SRC Fixed / PLL

Spread Spectrum Programming

bit(7:0)

These bits set the SRC, the ATIG and SB_SRC

spread pecentages.Please contact ICS for the

appropriate values.

Reserved

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P20

9EPRS475BGLFT

Mfr. #:

Buy 9EPRS475BGLFT

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9EPRS475BGLFT

9EPRS475BGLFT

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