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9EPRS475BGLFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
16
Integrated
Circuit
Systems, Inc.
ICS9EPRS475
Datasheet
1615—08/19/09
AC Electrical Characteristics - Low-Power DIF Outputs: CPUKG and HTT
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Crossing Point Variation
∆
V
CROSS
Single-ended Measurement 140 mV 1,2,5
Frequency f Spread Specturm On 198.8 200 MHz 1,3
Long Term Accuracy ppm Spread Specturm Off -300 +300 ppm 1,11
Rising Edge Slew Rate S
RISE
Differential Measurement 0.5 10 V/ns 1,4
Falling Edge Slew Rate S
FALL
Differential Measurement 0.5 10 V/ns 1,4
Slew Rate Variation
t
SLVAR
Single-ended Measurement 20 % 1
CPU, DIF HTT Jitter - Cycle to
Cycle
CPUJ
C2C
Differential Measurement 150 ps 1,6
Accumulated Jitter t
JACC
See Notes 1 ns 1,7
Peak to Peak Differential
Voltage
V
D(PK-PK)
Differential Measurement 400 2400 mV 1,8
Differential Voltage V
D
Differential Measurement 200 1200 mV 1,9
Duty Cycle D
CYC
Differential Measurement 45 55 % 1
Amplitude Variation
∆
V
D
Change in V
D
DC
cycle to cycle -75 75 mV 1,10
CPU[1:0] Skew CPU
SKEW10
Differential Measurement 100 ps 1
Notes on Electrical Characteristics:
Guaranteed by design and characterization, not 100% tested in production.
Minimum Frequency is a result of 0.5% down spread spectrum
6
Max difference of t
CYCLE
between any two adjacent cycles.
7
Accumulated tjc.over a 10 µs time period, measured with JIT2 TIE at 50ps interval.
8
VD(PK-PK) is the overall magnitude of the differential signal.
10
The difference in magnitude of two adjacent VD_DC measurements. VD_DC is the stable post overshoot and ring-back part of the signal.
11
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz
Single-ended measurement at crossing point. Value is maximum – minimum over all time. DC value of common mode is
not important due to the blocking cap.
5
Defined as the total variation of all crossing voltages of CLK rising and CLK# falling. Matching applies to rising edge rate of
CLK and falling edge of CLK#. It is measured using a +/-75mV window centered on the average cross point where CLK
meets CLK#.
Differential measurement through the range of ±100 mV, differential signal must remain monotonic and within slew rate
spec when crossing through this region.
9
VD(min) is the amplitude of the ring-back differential measurement, guaranteed by design, that ring-back will not cross
0V VD. VD(max) is the largest amplitude allowed.
17
Integrated
Circuit
Systems, Inc.
ICS9EPRS475
Datasheet
1615—08/19/09
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes
Long Accuracy ppm see Tperiod min-max values -300 300 ppm 1,2
33.33MHz output nominal 29.9910 30.0090 ns 2
33.33MHz output spread 29.9910 30.1598 ns 2
66.67MHz output nominal 14.9955 15.0045 ns 2
66.67MHz output spread 14.9955 15.0799 ns 2
Output High Voltage
V
OH
I
OH
= -1 mA
2.4 V 1
Output Low Voltage
V
OL
I
OL
= 1 mA
0.55 V 1
V
OH
@MIN = 1.0 V
-33 mA 1
V
OH
@ MAX = 3.135 V
-33 mA 1
V
OL
@ MIN = 1.95 V
30 mA 1
V
OL
@ MAX = 0.4 V
38 mA 1
Edge Rate
δ
V
/δ
t
Rising edge rate
(
VOL = 0.4 V
,
VOH = 2.4 V
)
14V/ns1
Edge Rate
δ
V
/δ
t
Falling edge rate
(
VOL = 0.4 V, VOH = 2.4 V
)
14V/ns1
Duty Cycle
d
t1
V
T
= 1.5 V
45 55 % 1
Jitter, Cycle to cycle
t
jcyc-cyc
V
T
= 1.5 V
180 ps 1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 5 pF with Rs = 22
Ω
(unless otherwise specified)
1
Guaranteed by design and characterization, not 100% tested in production.
2
All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that REF is at 14.31818MHz
I
OH
Electrical Characteristics - Single-ended HTT 66MHz Clock
I
OL
Output Low Current
PCI33 Clock period
HTT66 Clock period
T
period
T
period
Output High Current
AC Electrical Characteristics - Low-Power DIF Outputs: SRC, SB_SRC, ATIG
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Rising Edge Slew Rate t
SLR
Differential Measurement 0.6 4 V/ns 1,2
Falling Edge Slew Rate t
FLR
Differential Measurement 0.6 4 V/ns 1,2
Slew Rate Variation
t
SLVAR
Single-ended Measurement 20 % 1
Maximum Output Voltage V
HIGH
Includes overshoot 1150 mV 1
Minimum Output Voltage V
LOW
Includes undershoot -300 mV 1
Differential Voltage Swing V
SWING
Differential Measurement 300 mV 1
Crossing Point Voltage V
XABS
Single-ended Measurement 300 550 mV 1,3,4
Crossing Point Variation V
XABSVAR
Single-ended Measurement 140 mV 1,3,5
Duty Cycle D
CYC
Differential Measurement 45 55 % 1
SRC Jitter - Cycle to Cycle SRCJ
C2C
Differential Measurement 125 ps 1
SRC[3:0] Skew SRC
SKEW
Differential Measurement 100 ps 1
SB_SRC[1:0] Skew SRC
SKEW
Differential Measurement 100 ps 1
Notes on Electrical Characteristics:
1
Guaranteed by design and characterization, not 100% tested in production.
2
Slew rate measured through Vswing centered around differential zero
3
Vxabs is defined as the voltage where CLK = CLK#
4
Only applies to the differential rising edge (CLK rising and CLK# falling)
6
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz
5
Defined as the total variation of all crossing voltages of CLK rising and CLK# falling. Matching applies to rising edge rate of
18
Integrated
Circuit
Systems, Inc.
ICS9EPRS475
Datasheet
1615—08/19/09
Electrical Characteristics - USB - 48MHz
PARAMETER SYMBOL CONDITIONS* MIN TYP MAX UNITS NOTES
Long Accuracy ppm see Tperiod min-max values -100 100 ppm 1,2
Clock period
T
period
48.00MHz output nominal 20.8229 20.8344 ns 2
Clock Low Time
T
low
Measure from < 0.6V 9.3750 11.4580 ns 2
Clock High Time
T
high
Measure from > 2.0V 9.3750 11.4580 ns 2
Output High Voltage
V
OH
I
OH
= -1 mA
2.4 V
1
Output Low Voltage
V
OL
I
OL
= 1 mA
0.55 V
1
V
OH
@MIN = 1.0 V
-33 mA 1
V
OH
@MAX = 3.135 V
-33 mA 1
V
OL
@ MIN = 1.95 V
30 mA 1
V
OL
@ MAX = 0.4 V
38 mA 1
Edge Rate
δ
V
/δ
t
Rising edge rate
(
VOL = 0.4 V
,
VOH = 2.4 V
)
1.3 4 V/ns 1
Edge Rate
δ
V
/δ
t
Falling edge rate
(
VOL = 0.4 V, VOH = 2.4 V
)
1.3 4 V/ns 1
Duty Cycle
d
t1
V
T
= 1.5 V
45 55
%1
Group Skew
t
skew
V
T
= 1.5 V
250 ps
1
Jitter, Cycle to cycle
t
jcyc-cyc
V
T
= 1.5 V
130 ps
1,2
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 5 pF with Rs = 22
Ω
(unless otherwise specified)
1
Guaranteed by design and characterization, not 100% tested in production.
2
ICS recommended and/or chipset vendor layout guidelines must be followed to meet this specification
I
OH
Output High Current
Output Low Current
I
OL
Electrical Characteristics - REF-14.318MHz
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes
Long Accuracy ppm see Tperiod min-max values -300 300 ppm 1,2
Clock period
T
period
14.318MHz output nominal 69.8270 69.8550 ns 2
Clock Low Time
T
low
Measure from < 0.6V 30.9290 37.9130 ns 2
Clock High Time
T
high
Measure from > 2.0V 30.9290 37.9130 ns 2
Output High Voltage
V
OH
I
OH
= -1 mA
2.4 V 1
Output Low Voltage
V
OL
I
OL
= 1 mA
0.4 V 1
Output High Current
I
OH
V
OH
@MIN = 1.0 V,
V
OH
@MAX = 3.135 V
-29 -23 mA 1
Output Low Current
I
OL
V
OL
@MIN = 1.95 V,
V
OL
@MAX = 0.4 V
29 27 mA 1
Edge Rate
δ
V
/δ
t
Rising edge rate
(
VOL = 0.4 V
,
VOH = 2.4 V
)
1.3 2 V/ns 1
Edge Rate
δ
V
/δ
t
Falling edge rate
(
VOL = 0.4 V, VOH = 2.4 V
)
1.3 2 V/ns 1
Skew
t
sk1
V
T
= 1.5 V
250 ps 1
Duty Cycle
d
t1
V
T
= 1.5 V
45 55 % 1
Jitter
t
jcyc-cyc
V
T
= 1.5 V
300 ps 1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 5 pF with Rs = 22
Ω
(unless otherwise specified)
1
Guaranteed by design and characterization, not 100% tested in production.
2
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz
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9EPRS475BGLFT

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Description:
Real Time Clock LOW COST BASE
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