Not recommended for new designs. IRS20954SPBF
Please use IRS20957SPBF.
www.irf.com 12
SHUTDOWN
VB
VDD
IN
CSD
VSS
COM
OCSET
LO
VCC
HO
VS
DT
CSH
NC
NC
VREF
Figure 9: Shutdown Input
Latched Protection
Connecting CSD to V
DD
through a 10 kΩ or less resistor configures the IRS20954 as a latched over-current protection.
The over-current protection stays in shutdown mode after over-current condition detected. To reset the latch status, an
external reset switch brings CSD pin voltage down below the lower threshold, V
th2
. Minimum reset pulse width required
is 200 ns.
VB
VDD
IN
CSD
VSS
COM
OCSET
LO
VCC
HO
VS
DT
CSH
NC
NC
VREF
<10k
RESET
Figure 10: Latched Protection Configuration
Interfacing with System Controller
The IRS20954 communicates with external system controller by adding simple interfacing circuit shown in Fig. 11. A
generic PNP-BJT U1, such as 2N3906, is to send out SD signal when OCP event happens by capturing sinking
current in CSD pin. Another generic NPN-BJT U2, such as 2N3094, is to reset the internal protection logic by pulling
the CSD voltage below V
th2
. Note that the CSD pin is configured as a latched type OCP in this configuration.
Figure 11: Interfacing System Controller
Programming OCP Trip Level
In a Class D audio amplifier, the direction of the load current alternates according to the audio input signal. An over-
current condition can therefore happen during either a positive current cycle or a negative current cycle. The IRS20954
uses R
DS(ON)
in the output MOSFET as current sensing resistors. Due to the high voltage IC structural constraints, high
and low-side have different implementations of current sensing. Once measured current gets exceeded pre-
determined threshold, OC output signal is fed to the protection block to shutdown the MOSFET to protect the devices.
