Not recommended for new designs. IRS20954SPBF
Please use IRS20957SPBF.
www.irf.com 9
Functional Description
Floating PWM Input
The IRS20954 has a floating input interface which enables easy half bridge implementation. Three pins, V
DD
, CSD
and IN, are referenced to V
SS
. As a result, the PWM input signal can be directly fed into IN referencing ground, which
is typically middle point of DC bus in a half bridge configuration.
The IRS20954 also has a non-floating input with V
SS
tied to COM.
IN
VDD
VSS
10.4V
HV
LEVEL
SHIFT
CSD
PROTECTION
Floating Input Isolation
COM
Floating Bias
IRS20954
0V – 200V
Figure 5: Floating PWM Input Structure
Over-Current Protection (OCP)
The IRS20954 features over-current protection to protect the power MOSFET from over load conditions. The IRS20954 enters
shutdown mode when it detects over-current condition either from low-side or high-side current sensing. The timing control
block measures resume timing interval with an external timing capacitor Ct. All the critical timing of the over-current protection is
specified and guaranteed for secure protection.
The sequence on the over-current detection is:
1. As soon as either high or low-side current sensing block detects over-current condition, the OC Latch (OCL) flips and
shutdowns the outputs LO and HO.
2. The CSD pin starts discharging the external capacitor C
t
.
3. When V
SCD
crosses the lower threshold V
th2
, the output signal from the COMP2 resets the OCL.
4. The CSD pin starts charging the external capacitor C
t
.
5. When V
SCD
crosses the upper threshold V
th1
, the COMP1 flips and enables shutdown signal released.
6. If one of current sensing block detects over-current condition, the sequence is repeated until the cause of over-current
goes away.
