2000 Jul 27 3
Philips Semiconductors Product specification
96 kHz IEC 958 audio DAC UDA1351H
1 FEATURES
1.1 General
• 2.7 to 3.6 V power supply
• Integrated digital filter and Digital-to-Analog
Converter (DAC)
• Master-mode data output interface for off-chip sound
processing
• 256f
s
system clock output
• 20-bit data-path in interpolator
• High performance
• No analog post filtering required for DAC
• Supports sampling frequencies from 28 up to 100 kHz
• The UDA1351H is fully pin and function compatible with
the UDA1350AH.
1.2 Control
• Controlled either by means of static pins or via the
L3 microcontroller interface.
1.3 IEC 958 input
• On-chip amplifier for converting IEC 958 input to CMOS
levels
• Selectable IEC 958 input channel, one out of two
• Lock indication signal available on pin LOCK
• Lock indication signal combined on-chip with the Pulse
Code Modulation (PCM) status bit; in case non-PCM
has been detected pin LOCK indicates out-of-lock
• Key channel-status bits available via L3 interface (lock,
pre-emphasis, audio sample frequency, 2 channel PCM
indication and clock accuracy).
1.4 Digital output and input interfaces
• When the UDA1351H is clock master of the data output
interfaces:
– BCKO and WSO signals are output
–I
2
S-bus or LSB-justified 16, 20 and 24 bits formats
are supported.
• When the UDA1351H is clock slave of the data input
interface:
– BCK and WS signals are input
–I
2
S-bus or LSB-justified 16, 20 and 24 bits formats
are supported.
1.5 Digital sound processing and DAC
• Pre-emphasis information of IEC 958 input bitstream
available in L3 interface register and on pins
• Automatic de-emphasis when using IEC 958 input with
32.0, 44.1 and 48.0 kHz audio sample frequencies
• Soft mute by means of a cosine roll-off circuit selectable
via pin MUTE or the L3 interface
• Interpolating filter (f
s
to 128f
s
) by means of a cascade of
a recursive filter and a FIR filter
• Third-order noise shaper operating at 128f
s
generates
bitstream for the DAC
• Filter stream digital-to-analog converter.
2 APPLICATIONS
• Digital audio systems.
3 GENERAL DESCRIPTION
The UDA1351H is a single chip IEC 958 audio decoder
with an integrated stereo digital-to-analog converter
employing bitstream conversion techniques.
Besides the UDA1351H, which is the full featured version
in QFP44 package, there also exists the UDA1351TS.
The UDA1351TS has IEC 958 input to the DAC only and
is in SSOP28 package.
The UDA1351H can operate in various operating modes:
• IEC 958 input to the DAC including on-chip signal
processing
• IEC 958 input via the digital data output interface to the
external Digital Signal Processor (DSP)
• IEC 958 input to the DAC and a DSP
• IEC 958 input via a DSP to the DAC including on-chip
signal processing
• External source data input to the DAC including on-chip
signal processing.
