Clock operation M41T66
16/34 Doc ID 15108 Rev 2
3.2 Calibrating the clock
The M41T66 is driven by a quartz controlled oscillator with a nominal frequency of
32,768 Hz. The accuracy of the real-time clock depends on the frequency of the quartz
crystal that is used as the time-base for the RTC. The accuracy of the clock is dependent
upon the accuracy of the crystal, and the match between the capacitive load of the oscillator
circuit and the capacitive load for which the crystal was trimmed. The M41T66 oscillator is
designed for use with a 6 pF crystal load capacitance. When the calibration circuit is
properly employed, accuracy improves to better than ±2 ppm at 25 °C. The M41T66’s
oscillator can drive the crystal’s load capacitance that is greater than 6 pF. External
capacitors must be added to achieve better clock accuracy (see Figure 4 on page 7).
The oscillation rate of crystals changes with temperature (see Figure 11 on page 17).
Therefore, the M41T66 design employs periodic counter correction. The calibration circuit
adds or subtracts counts from the oscillator divider circuit at the divide by 256 stage, as
shown in Figure 12 on page 17. The number of times pulses which are blanked (subtracted,
negative calibration) or split (added, positive calibration) depends upon the value loaded into
the five calibration bits found in the calibration register. Adding counts speeds the clock up,
subtracting counts slows the clock down.
The calibration bits occupy the five lower order bits (D4-D0) in the calibration register (08h).
These bits can be set to represent any value between 0 and 31 in binary form. Bit D5 is a
sign bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration occurs
within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have one
second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is
loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a
binary 6 is loaded, the first 12 will be affected, and so on.
Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator
cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of
adjustment per calibration step in the calibration register.
Assuming that the oscillator is running at exactly 32,768 Hz, each of the 31 increments in
the Calibration byte would represent +10.7 or –5.35 seconds per day which corresponds to
a total range of +5.5 or –2.75 minutes per month (see Figure 12 on page 17).
Two methods are available for ascertaining how much calibration the M41T66 may require:
The first involves setting the clock, letting it run for a month and comparing it to a known
accurate reference and recording deviation over a fixed period of time. Calibration
values, including the number of seconds lost or gained in a given period, can be found
in application note AN934, “How to use the digital calibration feature in TIMEKEEPER
®
and serial real-time clock (RTC) products.” This allows the designer to give the end user
the ability to calibrate the clock as the environment requires, even if the final product is
packaged in a non-user serviceable enclosure. The designer could provide a simple
utility that accesses the calibration byte.
The second approach is better suited to a manufacturing environment, and involves the
use of the SQW pin. The SQW pin will toggle at 512 Hz when RS3 = '0,' RS2 = '1,'
RS1 = '1,' RS0 = '0,' SQWE = ‘1’ and ST = '0'.
Any deviation from 512 Hz indicates the degree and direction of oscillator frequency shift at
the test temperature. For example, a reading of 512.010124 Hz would indicate a +20 ppm
oscillator frequency error, requiring a –10 (XX001010) to be loaded into the calibration byte
for correction. Note that setting or changing the calibration byte does not affect the square
wave output frequency.
M41T66 Clock operation
Doc ID 15108 Rev 2 17/34
Figure 11. Crystal accuracy across temperature
Figure 12. Calibration waveform
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Clock operation M41T66
18/34 Doc ID 15108 Rev 2
3.3 Setting alarm clock registers
Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go
off at a prescribed time on a specific month, date, hour, minute, or second, or repeat every
year, month, day, hour, minute, or second. Bits RPT5–RPT1 put the alarm in the repeat
mode of operation. Ta bl e 3 shows the possible configurations. Codes not listed in the table
default to the once per second mode to quickly alert the user of an incorrect alarm setting.
When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5–RPT1, the AF (alarm flag) is set. If AFE (alarm flag enable) is also set, the
alarm condition activates the IRQ
/OUT. To disable the alarm, write '0' to the alarm date
register and to RPT5–RPT1.
Note: If the address pointer is allowed to increment to the flag register address, an alarm condition
will not cause the interrupt/flag to occur until the address pointer is moved to a different
address. It should also be noted that if the last address written is the “alarm seconds,” the
address pointer will increment to the flag address, causing this situation to occur.
The IRQ
/OUT output is cleared by a READ to the flags register as shown in Figure 13. A
subsequent READ of the flags register is necessary to see that the value of the alarm flag
has been reset to '0.'
Figure 13. Alarm interrupt reset waveform
Table 3. Alarm repeat modes
RPT5 RPT4 RPT3 RPT2 RPT1 Alarm setting
1 1 1 1 1 Once per second
1 1 1 1 0 Once per minute
1 1 1 0 0 Once per hour
1 1 0 0 0 Once per day
1 0 0 0 0 Once per month
0 0 0 0 0 Once per year
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M41T66Q6F

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Real Time Clock real-time clock with alarms
Lifecycle:
New from this manufacturer.
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