LTC4211
10
4211fc
For more information www.linear.com/LTC4211
TYPICAL PERFORMANCE CHARACTERISTICS
SUPPLY VOLTAGE (V)
0
GATE OVERVOLTAGE LOCKOUT THRESHOLD (V)
0.3
0.4
0.5
16
4211 G52
0.2
0.1
0
4
8
12
2 18
6
10
14
20
T
A
= 25°C
TEMPERATURE (°C)
–75
0
GATE OVERVOLTAGE LOCKOUT THRESHOLD (V)
0.1
0.3
0.4
0.5
25
25
50 150
4211 G53
0.2
50 0
75
100
125
V
CC
= 5V
C
FILTER
= 470pF
C
FILTER
= 0pF
V
CC
– V
SENSE
(mV)
0
50
100
150
200
250
300
1
10
100
1k
OVERCURRENT TO GATE LOW
PROPAGATION DELAY (µs)
4211 G54
T
A
= 25°C
V
CC
= 5V
C
GATE
= 10nF
GATE Overvoltage Lockout Threshold
vs Supply Voltage
GATE Overvoltage Lockout Threshold
vs Temperature
Overcurrent to GATE Low
Propagation Delay
PIN FUNCTIONS
(8-Lead Package/10-Lead Package)
RESET (Pin 1/Pin 1): An open-drain output that pulls to
GND if the voltage at the FB pin (Pin 5/Pin 6) falls below
the FB pin threshold (1.236V). During the start-up cycle,
the RESET pin goes high impedance at the end of the
second timing cycle after the FB pin goes above the FB
threshold. This pin requires an external pull-up resistor
to V
CC
. If an undervoltage lockout condition occurs, the
RESET pin pulls low independently of the FB pin to prevent
false glitches.
ON (Pin 2/Pin 2): An active high signal used to enable or
disable LTC4211 operation. COMP1’s high-to-low thresh
-
old is set at 1.236V and its hysteresis is set at 80mV. If a
logic high signal is applied to the ON pin (V
ON
> 1.316V),
the first timing cycle begins if an overvoltage condition
does not exist on the GATE pin (Pin 6/Pin 7). If a logic
low signal is applied to the ON pin (V
ON
< 1.236V), the
GATE pin is pulled low by an internal 200µA current sink.
The ON pin can also be used to reset the electronic circuit
breaker. If the ON pin is cycled low and then high following
a circuit breaker trip, the internal circuit breaker is reset,
and the LTC4211 begins a new start-up cycle.
TIMER (Pin 3/Pin 4): A capacitor connected from this pin
to GND sets the LTC4211’s system timing. The LTC4211’s
initial and second start-up timing cycles and its internal
“power good” delay time are defined by this capacitor.
GND (Pin 4/Pin 5): Device Ground Connection. Connect
this pin to the system’s analog ground plane.
FB (Pin 5/Pin 6): The FB (Feedback) pin is an input to the
COMP2 comparator and monitors the output supply voltage
through an external resistive divider. If V
FB
< 1.236V, the
RESET pin pulls low. An internal glitch filter at COMP2’s
output helps prevent negative voltage transients from
triggering a reset condition. If V
FB
> 1.239V, the RESET
pin goes high at the end of the second timing cycle.
GATE (Pin 6/Pin 7): The output signal at this pin is the
high side gate drive for the external N-channel FET pass
transistor.
As shown in the Block Diagram, an internal charge pump
supplies a 10µA gate current and sufficient gate volt-
age drive to the external FET for supply voltages from
2.5V
to
16.5V. The internal charge-pump and zener
LTC4211
11
4211fc
For more information www.linear.com/LTC4211
PIN FUNCTIONS
(8-Lead Package/10-Lead Package)
clamps at the GATE pin determine the gate drive voltage
(∆V
GATE
= V
GATE
V
CC
). The charge pump produces a
minimum 4.5V of ∆V
GATE
for supplies in the range of 2.7V
V
CC
< 4.75V. For 4.75V V
CC
12V the ∆V
GATE
is limited
by zener clamp Z1 connected between the GATE and V
CC
pins. The ∆V
GATE
is typically at 12V and with guaranteed
minimum value of 10V. For V
CC
> 12V, the Zener clamp
Z2 begins to set the limitation for ∆V
GATE
. Z2 clamps the
gate voltage to ground to 26V typically. The minimum Z2’s
clamp voltage is 23V. This effectively sets ∆V
GATE
to 8V
minimum at V
CC
= 15V.
SENSE (Pin 7/Pin 8): Circuit Breaker Set Pin. With a sense
resistor placed in the power path between V
CC
and SENSE,
the LTC4211’s electronic circuit breaker trips if the voltage
across the sense resistor exceeds the thresholds set inter
-
nally for the SLOW COMP and the FAST COMP, as shown in
the Block Diagram. The threshold for the SLOW COMP is
V
CB(SLOW)
= 50mV, and the electronic circuit breaker trips
if the voltage across the sense resistor exceeds 50mV for
20µs. The SLOW COMP delay is fixed in the S8/MS8 ver
-
sion and adjustable in the MS version of the LTC4211. To
adjust the SLOW COMPs delay, please refer to the section
on Adjusting SLOW COMP’s Response Time.
Under transient conditions where large step current
changes can and do occur over shorter periods of time,
a second (fast) comparator instead trips the electronic
circuit breaker. The threshold for the FAST COMP is set at
V
CB(FAST)
= 150mV, and the circuit breaker trips if the
voltage across the sense resistor exceeds 150mV for
more than 300ns. The FAST COMPs delay is fixed in the
LTC4211 and cannot be adjusted. To disable the electronic
circuit breaker, connect the V
CC
and SENSE pins together.
V
CC
(Pin 8/Pin 9): This is the positive supply input to
the LTC4211. The LTC4211 operates from 2.5V < V
CC
<
16.5V, and the supply current is typically 1mA. An internal
undervoltage lockout circuit disables the device until the
voltage at V
CC
exceeds 2.3V.
FAULT (Not available on S8/MS8, Pin 10 MS): FAULT is
both an input and an output. Connected to this pin are
an analog comparator (COMP6) and an open-drain N-
channel FET. During normal operation, if COMP6 is driven
below 1.236V, the electronic circuit breaker trips and the
GATE pin pulls low. Typically, a 10k pull-up resistor con
-
nects to the FAULT pin. This pull-up is required to allow
the LTC4211 to begin a second timing cycle (V
FAULT
>
1.286) and start-up properly. This also allows the use of
the FAULT pin as a status output. Under normal operating
conditions, the FAULT output is a logic high. Two condi
-
tions cause an active low on FAUL
T: (1) the LTC4211’s
electronic circuit breaker trips because of an output short
circuit causing a fast output overcurrent transient (FAST
COMP trips circuit breaker); or (2) V
FILTER
> 1.236V. The
FAULT output is driven to logic low and is latched logic
low until the ON pin is driven to logic low for 150µs (the
t
RESET
duration).
FILTER (Not available S8/MS8, Pin 3 MS): Overcurrent
Fault Timing Pin and Overvoltage Fault Set pin. With a
capacitor connected from this pin to ground, the SLOW
COMP’s response time can be adjusted. In the S8/MS8
version of the LTC4211, the FILTER pin is not available
and the delay time from overcurrent detect to GATE OFF
is fixed at 20µs.
LTC4211
12
4211fc
For more information www.linear.com/LTC4211
BLOCK DIAGRAM
+
V
REF
V
REF
+
+
+
SLOW
COMP
50mV 150mV
0.2V
COMP7
M3
GLITCH FILTER
(SEE NOTE 1)
UVLO
+
FAST
COMP
+
+
300ns
DELAY
GLITCH FILTER
150µs
GLITCH FILTER
FUNCTION OF
OVERDRIVE
BG
V
REF
0.2V
V
REF
= 1.236V
CB
TRIPS
OR UVLO
ON LOW
START-UP
CURRENT
REGULATOR
GATE
CHARGING
200µA 10µA
POWER BAD
CB TRIPS
V
REF
10µA
6 (7)GATE7 (8)SENSE8 (9)V
CC
M1
CHARGE
PUMP
Z1
V
Z
(TYP) = 12V
M2
GND
4 (5)
FAULT
(10)
MS ONLY
+
COMP1
2 ON 5 (6)
4211 BD
FB
COMP2
+
+
COMP3
t
TIMER
0.2V
V
REF
COMP4
+
V
REF
COMP5
NORMAL, RESET
NOTE 1: SET BY FILTER CAPACITOR FOR MS
20µs DEFAULT FOR MS8, S8
PIN NUMBERS FOR S8/MS8 (MS)
NORMAL
FAULT
TIMER
3 (4)
FILTER
(3)
MS ONLY
2µA
M6
M5
V
CC
2µA
M4
V
CC
10µA
LOGIC
RESET
1
COMP6
Z2
V
Z
(TYP) = 26V
V
CC

LTC4211CMS#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers Hot Swap Controller w/Active Limit
Lifecycle:
New from this manufacturer.
Delivery:
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