REV. B
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a
AD9762
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2000
12-Bit, 125 MSPS
TxDAC
®
D/A Converter
FUNCTIONAL BLOCK DIAGRAM
50pF
COMP1
+1.20V REF
AVDD ACOM
REFLO
COMP2
CURRENT
SOURCE
ARRAY
0.1F
+5V
SEGMENTED
SWITCHES
LSB
SWITCHES
REFIO
FS ADJ
DVDD
DCOM
CLOCK
+5V
R
SET
0.1F
CLOCK
IOUTA
IOUTB
0.1F
LATCHES
AD9762
SLEEP
DIGITAL DATA INPUTS
(
DB11–DB0
)
FEATURES
Member of Pin-Compatible TxDAC Product Family
125 MSPS Update Rate
12-Bit Resolution
Excellent Spurious Free Dynamic Range Performance
SFDR to Nyquist @ 5 MHz Output: 70 dBc
Differential Current Outputs: 2 mA to 20 mA
Power Dissipation: 175 mW @ 5 V to 45 mW @ 3 V
Power-Down Mode: 25 mW @ 5 V
On-Chip 1.20 V Reference
Single +5 V or +3 V Supply Operation
Package: 28-Lead SOIC and TSSOP
Edge-Triggered Latches
APPLICATIONS
Communication Transmit Channel:
Basestations (Single/Multichannel Applications)
ADSL/HFC Modems
Direct Digital Synthesis (DDS)
Instrumentation
PRODUCT DESCRIPTION
The AD9762 is the 12-bit resolution member of the TxDAC
series of high performance, low power CMOS digital-to-analog
converters (DACs). The TxDAC
family which consists of pin
compatible 8-, 10-, 12-, and 14-bit DACs is specifically opti-
mized for the transmit signal path of communication systems.
All of the devices share the same interface options, small outline
package and pinout, thus providing an upward or downward
component selection path based on performance, resolution and
cost. The AD9762 offers exceptional ac and dc performance
while supporting update rates up to 125 MSPS.
The AD9762’s flexible single-supply operating range of 2.7 V to
5.5 V and low power dissipation are well suited for portable and
low power applications. Its power dissipation can be further
reduced to a mere 45 mW without a significant degradation in
performance by lowering the full-scale current output. Also, a
power-down mode reduces the standby power dissipation to
approximately 25 mW.
The AD9762 is manufactured on an advanced CMOS process.
A segmented current source architecture is combined with a
proprietary switching technique to reduce spurious components
and enhance dynamic performance. Edge-triggered input
latches and a 1.2 V temperature compensated bandgap refer-
ence have been integrated to provide a complete monolithic
DAC solution. Flexible supply options support +3 V and +5 V
CMOS logic families.
The AD9762 is a current-output DAC with a nominal full-scale
output current of 20 mA and > 100 k output impedance.
TxDAC is a registered trademark of Analog Devices, Inc.
Differential current outputs are provided to support single-
ended or differential applications. Matching between the two
current outputs ensures enhanced dynamic performance in a
differential output configuration. The current outputs may be
tied directly to an output resistor to provide two complemen-
tary, single-ended voltage outputs or fed directly into a trans-
former. The output voltage compliance range is 1.25 V.
The on-chip reference and control amplifier are configured for
maximum accuracy and flexibility. The AD9762 can be driven
by the on-chip reference or by a variety of external reference
voltages. The internal control amplifier which provides a wide
(>10:1) adjustment span allows the AD9762 full-scale current
to be adjusted over a 2 mA to 20 mA range while maintaining
excellent dynamic performance. Thus, the AD9762 may oper-
ate at reduced power levels or be adjusted over a 20 dB range to
provide additional gain ranging capabilities.
The AD9762 is available in 28-lead SOIC and TSSOP pack-
ages. It is specified for operation over the industrial tempera-
ture range.
PRODUCT HIGHLIGHTS
1. The AD9762 is a member of the TxDAC
product family which
provides an upward or downward component selection path
based on resolution (8 to 14 bits), performance and cost.
2. Manufactured on a CMOS process, the AD9762 uses a pro-
prietary switching technique that enhances dynamic perfor-
mance beyond what was previously attainable by higher
power/cost bipolar or BiCMOS devices.
3. On-chip, edge-triggered input CMOS latches interface readily
to +3 V and +5 V CMOS logic families. The AD9762 can
support update rates up to 125 MSPS.
4. A flexible single-supply operating range of 2.7 V to 5.5 V and
a wide full-scale current adjustment span of 2 mA to 20 mA
allow the AD9762 to operate at reduced power levels.
5. The current output(s) of the AD9762 can be easily config-
ured for various single-ended or differential circuit topologies.
AD9762* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
EVALUATION KITS
AD9762 Evaluation Board
DOCUMENTATION
Application Notes
AN-237: Choosing DACs for Direct Digital Synthesis
AN-320A: CMOS Multiplying DACs and Op Amps Combine
to Build Programmable Gain Amplifier, Part 1
AN-414: Low Cost, Low Power Devices for HDSL
Applications
AN-420: Using the AD9708/AD9760/AD9701/AD9764-EB
Evaluation Board
AN-595: Understanding Pin Compatibility in the TxDAC®
Line of High Speed D/A Converters
AN-912: Driving a Center-Tapped Transformer with a
Balanced Current-Output DAC
Data Sheet
AD9762: 12-Bit, 100 MSPS+ TxDAC® D/A Converter Data
Sheet
TOOLS AND SIMULATIONS
AD9762 IBIS Models
REFERENCE MATERIALS
Informational
Advantiv™ Advanced TV Solutions
Solutions Bulletins & Brochures
Digital to Analog Converters ICs Solutions Bulletin
DESIGN RESOURCES
AD9762 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all AD9762 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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DC SPECIFICATIONS
Parameter Min Typ Max Units
RESOLUTION 12 Bits
DC ACCURACY
1
Integral Linearity Error (INL)
T
A
= +25°C –2.5 ±0.75 +2.5 LSB
T
MIN
to T
MAX
–4.0 ±1.0 +4.0 LSB
Differential Nonlinearity (DNL)
T
A
= +25°C –1.5 ±0.5 +1.5 LSB
T
MIN
to T
MAX
–2.0 ±0.75 +2.0 LSB
ANALOG OUTPUT
Offset Error –0.025 +0.025 % of FSR
Gain Error
(Without Internal Reference) –10 ±2 +10 % of FSR
Gain Error
(With Internal Reference) –10 ±1 +10 % of FSR
Full-Scale Output Current
2
2.0 20.0 mA
Output Compliance Range –1.0 +1.25 V
Output Resistance 100 k
Output Capacitance 5 pF
REFERENCE OUTPUT
Reference Voltage 1.08 1.20 1.32 V
Reference Output Current
3
100 nA
REFERENCE INPUT
Input Compliance Range 0.1 1.25 V
Reference Input Resistance 1 M
Small Signal Bandwidth (w/o C
COMP1
)
4
1.4 MHz
TEMPERATURE COEFFICIENTS
Offset Drift 0 ppm of FSR/°C
Gain Drift
(Without Internal Reference) ±50 ppm of FSR/°C
Gain Drift
(With Internal Reference) ±100 ppm of FSR/°C
Reference Voltage Drift ±50 ppm/°C
POWER SUPPLY
Supply Voltages
AVDD
5
2.7 5.0 5.5 V
DVDD 2.7 5.0 5.5 V
Analog Supply Current (I
AVDD
)2530mA
Digital Supply Current (I
DVDD
)
6
1.5 2 mA
Supply Current Sleep Mode (I
AVDD
) 8.5 mA
Power Dissipation
6
(5 V, I
OUTFS
= 20 mA) 133 160 mW
Power Dissipation
7
(5 V, I
OUTFS
= 20 mA) 190 mW
Power Dissipation
7
(3 V, I
OUTFS
= 2 mA) 45 mW
Power Supply Rejection Ratio—AVDD –0.4 +0.4 % of FSR/V
Power Supply Rejection Ratio—DVDD –0.025 +0.025 % of FSR/V
OPERATING RANGE –40 +85 °C
NOTES
1
Measured at IOUTA, driving a virtual ground.
2
Nominal full-scale current, I
OUTFS
, is 32 × the I
REF
current.
3
Use an external buffer amplifier to drive any external load.
4
Reference bandwidth is a function of external cap at COMP1 pin and signal level. Refer to Figure 41.
5
For operation below 3 V, it is recommended that the output current be reduced to 12 mA or less to maintain optimum performance.
6
Measured at f
CLOCK
= 25 MSPS and f
OUT
= 1.0 MHz.
7
Measured as unbuffered voltage output into 50 R
LOAD
at IOUTA and IOUTB, f
CLOCK
= 100 MSPS and f
OUT
= 40 MHz.
Specifications subject to change without notice.
(T
MIN
to T
MAX
, AVDD = +5 V, DVDD = +5 V, I
OUTFS
= 20 mA, unless otherwise noted)
–2–
REV. B
AD9762–SPECIFICATIONS

AD9762ARUZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 12-Bit 100 MSPS
Lifecycle:
New from this manufacturer.
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