AD9762
15
REV. B
I
OUTFS
mA
30
0
2204 6 8 10 12141618
25
20
15
10
5
I
AVDD
mA
Figure 47. I
AVDD
vs. I
OUTFS
Conversely, I
DVDD
is dependent on both the digital input wave-
form, f
CLOCK
, and digital supply DVDD. Figures 48 and 49
show I
DVDD
as a function of full-scale sine wave output ratios
(f
OUT
/f
CLOCK
) for various update rates with DVDD = 5 V and
DVDD = 3 V, respectively. Note, how I
DVDD
is reduced by more
than a factor of 2 when DVDD is reduced from 5 V to 3 V.
RATIO (f
OUT
/f
CLK
)
18
16
0
0.01 10.1
I
DVDD
mA
8
6
4
2
12
10
14
5MSPS
25MSPS
50MSPS
100MSPS
125MSPS
Figure 48. I
DVDD
vs. Ratio @ DVDD = 5 V
RATIO (f
OUT
/f
CLK
)
8
0
0.01 10.1
I
DVDD
mA
6
4
2
5MSPS
25MSPS
50MSPS
100MSPS
125MSPS
Figure 49. I
DVDD
vs. Ratio @ DVDD = 3 V
APPLYING THE AD9762
OUTPUT CONFIGURATIONS
The following sections illustrate some typical output configura-
tions for the AD9762. Unless otherwise noted, it is assumed
that I
OUTFS
is set to a nominal 20 mA. For applications requir-
ing the optimum dynamic performance, a differential output
configuration is suggested. A differential output configuration
may consist of either an RF transformer or a differential op amp
configuration. The transformer configuration provides the
optimum high frequency performance and is recommended for
any application allowing for ac coupling. The differential op
amp configuration is suitable for applications requiring dc
coupling, a bipolar output, signal gain and/or level shifting.
A single-ended output is suitable for applications requiring a
unipolar voltage output. A positive unipolar output voltage will
result if I
OUTA
and/or I
OUTB
is connected to an appropriately
sized load resistor, R
LOAD
, referred to ACOM. This configura-
tion may be more suitable for a single-supply system requiring
a dc coupled, ground referred output voltage. Alternatively, an
amplifier could be configured as an I-V converter thus converting
I
OUTA
or I
OUTB
into a negative unipolar voltage. This configura-
tion provides the best dc linearity since I
OUTA
or I
OUTB
is
maintained at a virtual ground. Note, I
OUTA
provides slightly
better performance than I
OUTB
.
DIFFERENTIAL COUPLING USING A TRANSFORMER
An RF transformer can be used to perform a differential-to-
single-ended signal conversion as shown in Figure 50. A
differentially coupled transformer output provides the optimum
distortion performance for output signals whose spectral content
lies within the transformer’s passband. An RF transformer such
as the Mini-Circuits T1-1T provides excellent rejection of
common-mode distortion (i.e., even-order harmonics) and noise
over a wide frequency range. It also provides electrical isolation
and the ability to deliver twice the power to the load. Trans-
formers with different impedance ratios may also be used for
impedance matching purposes. Note that the transformer
provides ac coupling only.
R
LOAD
AD9762
22
21
MINI-CIRCUITS
T1-1T
OPTIONAL R
DIFF
IOUTA
IOUTB
Figure 50. Differential Output Using a Transformer
The center tap on the primary side of the transformer must be
connected to ACOM to provide the necessary dc current path
for both I
OUTA
and I
OUTB
. The complementary voltages appear-
ing at I
OUTA
and I
OUTB
(i.e., V
OUTA
and V
OUTB
) swing symmetri-
cally around ACOM and should be maintained with the specified
output compliance range of the AD9762. A differential resistor,
R
DIFF
, may be inserted in applications in which the output of
the transformer is connected to the load, R
LOAD
, via a passive
reconstruction filter or cable. R
DIFF
is determined by the
transformer’s impedance ratio and provides the proper source
termination which results in a low VSWR. Note that approxi-
mately half the signal power will be dissipated across R
DIFF
.
AD9762
16
REV. B
DIFFERENTIAL USING AN OP AMP
An op amp can also be used to perform a differential to single-
ended conversion as shown in Figure 51. The AD9762 is
configured with two equal load resistors, R
LOAD
, of 25 .
The differential voltage developed across I
OUTA
and I
OUTB
is
converted to a single-ended signal via the differential op amp
configuration. An optional capacitor can be installed across
I
OUTA
and I
OUTB
forming a real pole in a low-pass filter. The
addition of this capacitor also enhances the op amps distortion
performance by preventing the DACs high slewing output from
overloading the op amp’s input.
AD9762
22
IOUTA
IOUTB
21
C
OPT
500
225
225
500
2525
AD8047
Figure 51. DC Differential Coupling Using an Op Amp
The common-mode rejection of this configuration is typically
determined by the resistor matching. In this circuit, the differ-
ential op amp circuit using the AD8047 is configured to provide
some additional signal gain. The op amp must operate off of a
dual supply since its output is approximately ±1.0 V. A high
speed amplifier capable of preserving the differential perfor-
mance of the AD9762 while meeting other system level objec-
tives (i.e., cost, power) should be selected. The op amps
differential gain, its gain setting resistor values, and full-scale
output swing capabilities should all be considered when opti-
mizing this circuit.
The differential circuit shown in Figure 52 provides the neces-
sary level-shifting required in a single supply system. In this
case, AVDD which is the positive analog supply for both the
AD9762 and the op amp is also used to level-shift the differ-
ential output of the AD9762 to midsupply (i.e., AVDD/2). The
AD8041 is a suitable op amp for this application.
AD9762
22
IOUTA
IOUTB
21
C
OPT
500
225
225
1k
25
25
AD8041
1k
AVDD
Figure 52. Single-Supply DC Differential Coupled Circuit
SINGLE-ENDED UNBUFFERED VOLTAGE OUTPUT
Figure 53 shows the AD9762 configured to provide a unipolar
output range of approximately 0 V to +0.5 V for a doubly termi-
nated 50 cable since the nominal full-scale current, I
OUTFS
, of
20 mA flows through the equivalent R
LOAD
of 25 . In this
case, R
LOAD
represents the equivalent load resistance seen by
I
OUTA
or I
OUTB
. The unused output (I
OUTA
or I
OUTB
) can be
connected to ACOM directly or via a matching R
LOAD
. Different
values of I
OUTFS
and R
LOAD
can be selected as long as the positive
compliance range is adhered to. One additional consideration in
this mode is the integral nonlinearity (INL) as discussed in the
Analog Output section of this data sheet. For optimum INL
performance, the single-ended, buffered voltage output configu-
ration is suggested.
AD9762
IOUTA
IOUTB
21
50
25
50
V
OUTA
= 0 TO +0.5V
I
OUTFS
= 20mA
22
Figure 53. 0 V to +0.5 V Unbuffered Voltage Output
SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT
CONFIGURATION
Figure 54 shows a buffered single-ended output configuration
in which the op amp U1 performs an I-V conversion on the
AD9762 output current. U1 maintains I
OUTA
(or I
OUTB
) at a
virtual ground, thus minimizing the nonlinear output imped-
ance effect on the DAC’s INL performance as discussed in
the Analog Output section. Although this single-ended configu-
ration typically provides the best dc linearity performance, its ac
distortion performance at higher DAC update rates may be
limited by U1’s slewing capabilities. U1 provides a negative
unipolar output voltage and its full-scale output voltage is sim-
ply the product of R
FB
and I
OUTFS
. The full-scale output should
be set within U1’s voltage output swing capabilities by scaling
I
OUTFS
and/or R
FB
. An improvement in ac distortion perfor-
mance may result with a reduced I
OUTFS
since the signal current
U1 will be required to sink will be subsequently reduced.
IOUTA
IOUTB
C
OPT
200
U1
V
OUT
= I
OUTFS
R
FB
I
OUTFS
= 10mA
R
FB
200
AD9762
21
22
Figure 54. Unipolar Buffered Voltage Output
POWER AND GROUNDING CONSIDERATIONS
In systems seeking to simultaneously achieve high speed and
high performance, the implementation and construction of the
printed circuit board design is often as important as the circuit
design. Proper RF techniques must be used in device selection;
placement and routing; and supply bypassing and grounding.
Figures 60–65 illustrate the recommended printed circuit board
ground, power and signal plane layouts which are implemented
on the AD9762 evaluation board.
Proper grounding and decoupling should be a primary objective
in any high speed, high resolution system. The AD9762 features
separate analog and digital supply and ground pins to optimize
the management of analog and digital ground currents in a
system. In general, AVDD, the analog supply, should be decoupled
to ACOM, the analog common, as close to the chip as physi-
cally possible. Similarly, DVDD, the digital supply, should be
decoupled to DCOM as close as physically as possible.
AD9762
17
REV. B
For those applications that require a single +5 V or +3 V supply
for both the analog and digital supply, a clean analog supply
may be generated using the circuit shown in Figure 55. The
circuit consists of a differential LC filter with separate power
supply and return lines. Lower noise can be attained using low
ESR type electrolytic and tantalum capacitors.
100F
ELECT.
10-22F
TANT.
0.1F
CER.
TTL/CMOS
LOGIC
CIRCUITS
+5V OR +3V
POWER SUPPLY
FERRITE
BEADS
AVDD
ACOM
Figure 55. Differential LC Filter for Single +5 V or +3 V
Applications
Maintaining low noise on power supplies and ground is critical
to obtaining optimum results from the AD9762. If properly
implemented, ground planes can perform a host of functions on
high speed circuit boards: bypassing, shielding, current trans-
port, etc. In mixed signal design, the analog and digital portions
of the board should be distinct from each other, with the analog
ground plane confined to the areas covering the analog signal
traces, and the digital ground plane confined to areas covering
the digital interconnects.
All analog ground pins of the DAC, reference and other analog
components should be tied directly to the analog ground plane.
The two ground planes should be connected by a path 1/8 to
1/4 inch wide underneath or within 1/2 inch of the DAC to
maintain optimum performance. Care should be taken to ensure
that the ground plane is uninterrupted over crucial signal paths.
On the digital side, this includes the digital input lines running
to the DAC as well as any clock signals. On the analog side, this
includes the DAC output signal, reference signal and the supply
feeders.
The use of wide runs or planes in the routing of power lines is
also recommended. This serves the dual role of providing a low
series impedance power supply to the part, as well as providing
some “free” capacitive decoupling to the appropriate ground
plane. It is essential that care be taken in the layout of signal
and power ground interconnects to avoid inducing extraneous
voltage drops in the signal ground paths. It is recommended that
all connections be short, direct and as physically close to the
package as possible in order to minimize the sharing of conduc-
tion paths between different currents. When runs exceed an inch
in length, strip line techniques with proper termination resistor
should be considered. The necessity and value of this resistor
will be dependent upon the logic family used.
For a more detailed discussion of the implementation and
construction of high speed, mixed signal printed circuit boards,
refer to Analog Devices’ application notes AN-280 and AN-333.
APPLICATIONS
Using the AD9762 for QAM Modulation
QAM is one of the most widely used digital modulation schemes
in digital communication systems. This modulation technique
can be found in both FDM as well as spreadspectrum (i.e.,
CDMA) based systems. A QAM signal is a carrier frequency
which is both modulated in amplitude (i.e., AM modulation)
and in phase (i.e., PM modulation). It can be generated by
independently modulating two carriers of identical frequency
but with a 90° phase difference. This results in an in-phase (I)
carrier component and a quadrature (Q) carrier component at a
90° phase shift with respect to the I component. The I and Q
components are then summed to provide a QAM signal at the
specified carrier frequency.
A common and traditional implementation of a QAM modu-
lator is shown in Figure 56. The modulation is performed in the
analog domain in which two DACs are used to generate the
baseband I and Q components, respectively. Each component is
then typically applied to a Nyquist filter before being applied to
a quadrature mixer. The matching Nyquist filters shape and
limit each component’s spectral envelope while minimizing
intersymbol interference. The DAC is typically updated at the
QAM symbol rate or possibly a multiple of it if an interpolating
filter precedes the DAC. The use of an interpolating filter typi-
cally eases the implementation and complexity of the analog
filter, which can be a significant contributor to mismatches in
gain and phase between the two baseband channels. A quadra-
ture mixer modulates the I and Q components with in-phase
and quadrature phase carrier frequency and then sums the two
outputs to provide the QAM signal.
AD9762
0
90
Σ
AD9762
CARRIER
FREQUENCY
12
12
TO
MIXER
DSP
OR
ASIC
NYQUIST
FILTERS
QUADRATURE
MODULATOR
Figure 56. Typical Analog QAM Architecture
In this implementation, it is much more difficult to maintain
proper gain and phase matching between the I and Q channels.
The circuit implementation shown in Figure 57 helps improve
upon the matching and temperature stability characteristics
between the I and Q channels. Using a single voltage reference
derived from U1 to set the gain for both the I and Q channels
will improve the gain matching and stability. Further enhance-
ments in gain matching and stability are achieved by using
separate matching resistor networks for both R
SET
and R
LOAD
.
Additional trim capability via R
CAL1
and R
CAL2
can be added to
compensate for any initial mismatch in gain between the two
channels. This may be attributed to any mismatch between U1
and U2’s gain setting resistor, (R
SET
); effective load resistance,
(R
LOAD
); and/or voltage offset of each DAC’s control amplifier.
The differential voltage outputs of U1 and U2 are fed into their
respective differential inputs of a quadrature mixer via matching
50 filter networks.

AD9762ARUZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 12-Bit 100 MSPS
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