AD9762
–11–
REV. B
FUNCTIONAL DESCRIPTION
Figure 39 shows a simplified block diagram of the AD9762.
The AD9762 consists of a large PMOS current source array
that is capable of providing up to 20 mA of total current. The
array is divided into 31 equal currents that make up the 5
most significant bits (MSBs). The next 4 bits or middle bits
consist of 15 equal current sources whose value is 1/16th of an
MSB current source. The remaining LSBs are binary weighted
fractions of the middle-bits current sources. Implementing
the middle and lower bits with current sources, instead of an
R-2R ladder, enhances its dynamic performance for multitone
or low amplitude signals and helps maintain the DAC’s high
output impedance (i.e., >100 kΩ).
All of these current sources are switched to one or the other
of the two output nodes (i.e., I
OUTA
or I
OUTB
) via PMOS differen-
tial current switches. The switches are based on a new archi-
tecture that drastically improves distortion performance. This new
switch architecture reduces various timing errors and provides
matching complementary drive signals to the inputs of the
differential current switches.
The analog and digital sections of the AD9762 have separate
power supply inputs (i.e., AVDD and DVDD) that can operate
independently over a 2.7 volt to 5.5 volt range. The digital
section, which is capable of operating up to a 125 MSPS clock
rate, consists of edge-triggered latches and segment decoding
logic circuitry. The analog section includes the PMOS current
sources, the associated differential switches, a 1.20 V bandgap
voltage reference and a reference control amplifier.
The full-scale output current is regulated by the reference
control amplifier and can be set from 2 mA to 20 mA via an
external resistor, R
SET
. The external resistor, in combination
with both the reference control amplifier and voltage refer-
ence V
REFIO
, sets the reference current I
REF
, which is mirrored
over to the segmented current sources with the proper scaling
factor. The full-scale current, I
OUTFS
, is thirty-two times the value
of I
REF
.
DAC TRANSFER FUNCTION
The AD9762 provides complementary current outputs, I
OUTA
and I
OUTB
. I
OUTA
will provide a near full-scale current output,
I
OUTFS
, when all bits are high (i.e., DAC CODE = 4095) while
I
OUTB
, the complementary output, provides no current. The
current output appearing at I
OUTA
and I
OUTB
is a function of
both the input code and I
OUTFS
and can be expressed as:
I
OUTA
= (DAC CODE/4096) × I
OUTFS
(1)
I
OUTB
= (4095 – DAC CODE)/4096 × I
OUTFS
(2)
where DAC CODE = 0 to 4095 (i.e., Decimal Representation).
As mentioned previously, I
OUTFS
is a function of the reference
current I
REF
, which is nominally set by a reference voltage
V
REFIO
and external resistor R
SET
. It can be expressed as:
I
OUTFS
= 32 × I
REF
(3)
where I
REF
= V
REFIO
/R
SET
(4)
The two current outputs will typically drive a resistive load
directly or via a transformer. If dc coupling is required, I
OUTA
and I
OUTB
should be directly connected to matching resistive
loads, R
LOAD
, which are tied to analog common, ACOM. Note,
R
LOAD
may represent the equivalent load resistance seen by
I
OUTA
or I
OUTB
as would be the case in a doubly terminated
50 Ω or 75 Ω cable. The single-ended voltage output appearing
at the I
OUTA
and I
OUTB
nodes is simply :
V
OUTA
= I
OUTA
× R
LOAD
(5)
V
OUTB
= I
OUTB
× R
LOAD
(6)
Note the full-scale value of V
OUTA
and V
OUTB
should not exceed
the specified output compliance range to maintain specified
distortion and linearity performance.
The differential voltage, V
DIFF
, appearing across I
OUTA
and
I
OUTB
is:
V
DIFF
= (I
OUTA
– I
OUTB
) × R
LOAD
(7)
Substituting the values of I
OUTA
, I
OUTB
, and I
REF
; V
DIFF
can be
expressed as:
V
DIFF
= {(2 DAC CODE – 4095)/4096} ×
(32 R
LOAD
/R
SET
) × V
REFIO
(8)
These last two equations highlight some of the advantages of
operating the AD9762 differentially. First, the differential
operation will help cancel common-mode error sources associated
with I
OUTA
and I
OUTB
such as noise, distortion and dc offsets.
Second, the differential code dependent current and subsequent
voltage, V
DIFF
, is twice the value of the single-ended voltage
output (i.e., V
OUTA
or V
OUTB
), thus providing twice the signal
power to the load.
Note, the gain drift temperature performance for a single-ended
(V
OUTA
and V
OUTB
) or differential output (V
DIFF
) of the AD9762
can be enhanced by selecting temperature tracking resistors for
R
LOAD
and R
SET
due to their ratiometric relationship as shown
in Equation 8.
DIGITAL DATA INPUTS
DB11–DB0
50pF
COMP1
+1.20V REF
AVDD ACOM
REFLO
COMP2
PMOS
CURRENT SOURCE
ARRAY
0.1F
+5V
SEGMENTED SWITCHES
FOR DB11–DB3
LSB
SWITCHES
REFIO
FS ADJ
DVDD
DCOM
CLOCK
+5V
R
SET
2k⍀
0.1F
IOUTA
IOUTB
0.1F
AD9762
SLEEP
LATCHES
I
REF
V
REFIO
CLOCK
I
OUTB
I
OUTA
R
LOAD
50⍀
V
OUTB
V
OUTA
R
LOAD
50⍀
V
DIFF
= V
OUTA
– V
OUTB
Figure 39. Functional Block Diagram
