XR21V1414
19
REV. 1.3.0
4-CH FULL-SPEED USB UART
3.2 UART Register Map
T
ABLE
7: UART R
EGISTERS
A
DDRESS
R
EGISTER
N
AME
B
IT
-7 B
IT
-6 B
IT
-5 B
IT
-4 B
IT
-3 B
IT
-2 B
IT
-1 B
IT
-0
0X00 Reserved 0 0 0 0 0 0 0 0
0X01 Reserved 0 0 0 0 0 0 0 0
0X02 Reserved 0 0 0 0 0 0 0 0
0X03 UART_ENABLE 0 0 0 0 0 0 RX TX
0X04 CLOCK_DIVISOR0 Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x05 CLOCK_DIVISOR1 Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10 Bit-9 Bit-8
0x06 CLOCK_DIVISOR2 0 0 0 0 0 Bit-18 Bit-17 Bit-16
0x07 TX_CLOCK_MASK0 Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x08 TX_CLOCK_MASK1 Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10 Bit-9 Bit-8
0x09 RX_CLOCK_MASK0 Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x0A RX_CLOCK_MASK1 Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10 Bit-9 Bit-8
0x0B CHARACTER_FORMAT Stop Parity Data Bits
0x0C FLOW_CONTROL
0 0 0 0
Half-
Duplex
Flow Control Mode Select
0x0D Reserved 0 0 0 0 0 0 0 0
0x0E Reserved 0 0 0 0 0 0 0 0
0x0F Reserved 0 0 0 0 0 0 0 0
0x10 XON_CHAR Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x11 XOFF_CHAR Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x12 LOOPBACK_CTL 0 0 0 0 0 En Chan
0x13 ERROR_STATUS Break
Status
Overrun
Error
Parity
Error
Framing
Error
Break
Error
0 0 0
0x14 TX_BREAK Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x15 RS485_DELAY 0 0 0 0 Delay
0x16 Reserved 0 0 0 0 0 0 0 0
0x17 Reserved 0 0 0 0 0 0 0 0
0x18 Reserved 0 0 0 0 0 0 0 0
0x19 Reserved 0 0 0 0 0 0 0 0
0x1A GPIO_MODE
0 0 0 0
RS485
Polarity
Mode Select
0x1B GPIO_DIRECTION 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
0x1C GPIO_INT_MASK 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
0x1D GPIO_SET 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
0x1E GPIO_CLEAR 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
0x1F GPIO_STATUS 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
XR21V1414
20
4-CH FULL-SPEED USB UART
REV. 1.3.0
3.3 UART Register Descriptions
All register bits default to a value of ’0’ unless otherwise noted.
3.3.1 UART_ENABLE Register Description (Read/Write)
This register enables the UART TX and RX. For proper functionality, the UART TX and RX must be enabled in
the following order:
FIFO_ENABLE_CHx = 0x1 // Enable TX FIFO
UART_ENABLE = 0x3 // Enable TX and RX of that channel
FIFO_ENABLE_CHx = 0x3 // Enable RX FIFO
UART_ENABLE[0]: Enable UART TX
Logic 0 = UART TX disabled.
Logic 1 = UART TX enabled.
UART_ENABLE[1]: Enable UART RX
Logic 0 = UART RX disabled.
Logic 1 = UART RX enabled.
UART_ENABLE[7:2]: Reserved
These bits are reserved and should remain ’0’.
3.3.2 CLOCK_DIVISOR0, CLOCK_DIVISOR1, CLOCK_DIVISOR2 Register Description (Read/Write)
These registers are used for programming the baud rate. The V1414 uses a 19-bit divisor and 16-bit mask
register. Using the internal 48MHz oscillator, the 19-bit divisor is calculated as follows:
CLOCK_DIVISOR = Trunc ( 48000000 / Baud Rate )
For example, if the the baud rate is 115200bps, then
CLOCK_DIVISOR = Trunc ( 48000000 / 115200 ) = Trunc (416.66667) = 416
CLOCK_DIVISOR0[7:0]: Baud rate clock divisor bits [7:0]
CLOCK_DIVISOR1[7:0]: Baud rate clock divisor bits [15:8]
CLOCK_DIVISOR2[2:0]: Baud rate clock divisor bits [18:16]
CLOCK_DIVISOR2[7:3]: Reserved
These bits are reserved and should remain ’0’.
3.3.3 TX_CLOCK_MASK0, TX_CLOCK_MASK1 Register Description (Read/Write)
A look-up table is used for the value of the 16-bit TX Clock mask registers. The index of the look-up table is
calculated as follows:
index = Trunc ( ( ( 48000000 / Baud Rate ) - CLOCK_DIVISOR ) * 32)
For example, if the baud rate is 115200bps, then the index will be:
index = Trunc ( ( ( 48000000 / 115200 ) - 416 ) * 32) = Trunc (21.3333) = 21
The values for some baud rates to program the TX_CLOCK_MASK registers are listed in Table 8. For baud
rates that are not listed, use the index to select TX_CLOCK_MASK register values from Table 9.
3.3.4 RX_CLOCK_MASK0, RX_CLOCK_MASK1 Register Description (Read/Write)
The values for some baud rates to program the RX_CLOCK_MASK registers are listed in
Table 8. For baud
rates that are not listed, use the same index calculated for the TX_CLOCK_MASK register to select
RX_CLOCK_MASK register values from Table 9.
XR21V1414
21
REV. 1.3.0
4-CH FULL-SPEED USB UART
For baud rates that are not listed in the table above, use the index value calcuated using the formula in
“Section 3.3.3, TX_CLOCK_MASK0, TX_CLOCK_MASK1 Register Description (Read/Write)” on page 20
to determine which TX Clock and RX Clock Mask register values to use from Table 9. For the the RX Clock
Mask register, there are 2 values listed and would depend on whether the Clock Divisor is even or odd. For
even Clock Divisors, use the value from the first column. For odd Clock Divisors, use the value from the last
column.
T
ABLE
8: C
LOCK
D
IVISOR AND
C
LOCK
M
ASK
V
ALUES FOR
C
OMMON
B
AUD
R
ATES
B
AUD
R
ATE
(
BPS
) C
LOCK
D
IVISOR
(D
ECIMAL
) TX C
LOCK
M
ASK
(H
EX
) RX C
LOCK
M
ASK
(H
EX
)
1200 40000 0x0000 0x0000
2400 20000 0x0000 0x0000
4800 10000 0x0000 0x0000
9600 5000 0x0000 0x0000
19200 2500 0x0000 0x0000
38400 1250 0x0000 0x0000
57600 833 0x0912 0x0924
115200 416 0x0B6D 0x0B6A
230400 208 0x0912 0x0924
460800 104 0x0208 0x0040
500000 96 0x0000 0x0000
576000 83 0x0912 0x0924
921600 52 0x0040 0x0000
1000000 48 0x0000 0x0000
1152000 41 0x0B6D 0x0DB6
1500000 32 0x0000 0x0000
2000000 24 0x0000 0x0000
2500000 19 0x0104 0x0108
3000000 16 0x0000 0x0000
3125000 15 0x0492 0x0492
3500000 13 0x076D 0x0BB6
4000000 12 0x0000 0x0000
4250000 11 0x0122 0x0224
6250000 7 0x0B6D 0x0DB6
8000000 6 0x0000 0x0000
12000000 4 0x0000 0x0000

XR21V1414IM48-F

Mfr. #:
Manufacturer:
MaxLinear
Description:
USB Interface IC 4-Ch 12Mbps 48MHz Internal clock; UART
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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