LPC2141_42_44_46_48 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 12 August 2011 10 of 45
NXP Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
P0.29/AD0.2/
CAP0.3/MAT0.3
14
[4]
I/O P0.29 — General purpose input/output digital pin (GPIO).
I AD0.2 — ADC 0, input 2.
I CAP0.3 — Capture input for Timer 0, channel 3.
O MAT0.3 — Match output for Timer 0, channel 3.
P0.30/AD0.3/
EINT3/CAP0.0
15
[4]
I/O P0.30 — General purpose input/output digital pin (GPIO).
I AD0.3 — ADC 0, input 3.
I EINT3 — External interrupt 3 input.
I CAP0.0 — Capture input for Timer 0, channel 0.
P0.31/UP_LED/
CONNECT
17
[6]
O P0.31 — General purpose output only digital pin (GPO).
O UP_LED — USB GoodLink LED indicator. It is LOW when device is
configured (non-control endpoints enabled). It is HIGH when the
device is not configured or during global suspend.
O CONNECT — Signal used to switch an external 1.5 k resistor under
the software control. Used with the SoftConnect USB feature.
Important: This is an digital output only pin. This pin MUST NOT be
externally pulled LOW when RESET
pin is LOW or the JTAG port will
be disabled.
P1.0 to P1.31 I/O Port 1: Port 1 is a 32-bit bidirectional I/O port with individual direction
controls for each bit. The operation of port 1 pins depends upon the
pin function selected via the pin connect block. Pins 0 through 15 of
port 1 are not available.
P1.16/
TRACEPKT0
16
[6]
I/O P1.16 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
O TRACEPKT0 — Trace Packet, bit 0.
P1.17/
TRACEPKT1
12
[6]
I/O P1.17 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
O TRACEPKT1 — Trace Packet, bit 1.
P1.18/
TRACEPKT2
8
[6]
I/O P1.18 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
O TRACEPKT2 — Trace Packet, bit 2.
P1.19/
TRACEPKT3
4
[6]
I/O P1.19 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
O TRACEPKT3 — Trace Packet, bit 3.
P1.20/
TRACESYNC
48
[6]
I/O P1.20 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
O TRACESYNC — Trace Synchronization.
Note: LOW on this pin while RESET
is LOW enables pins P1.25:16 to
operate as Trace port after reset.
P1.21/
PIPESTAT0
44
[6]
I/O P1.21 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
O PIPESTAT0 — Pipeline Status, bit 0.
P1.22/
PIPESTAT1
40
[6]
I/O P1.22 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
O PIPESTAT1 — Pipeline Status, bit 1.
Table 3. Pin description
…continued
Symbol Pin Type Description
LPC2141_42_44_46_48 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 12 August 2011 11 of 45
NXP Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
P1.23/
PIPESTAT2
36
[6]
I/O P1.23 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
O PIPESTAT2 — Pipeline Status, bit 2.
P1.24/
TRACECLK
32
[6]
I/O P1.24 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
O TRACECLK — Trace Clock.
P1.25/EXTIN0 28
[6]
I/O P1.25 — General purpose input/output digital pin (GPIO). Standard
I/O port with internal pull-up.
I EXTIN0 — External Trigger Input.
P1.26/RTCK 24
[6]
I/O P1.26 — General purpose input/output digital pin (GPIO).
I/O RTCK — Returned Test Clock output. Extra signal added to the JTAG
port. Assists debugger synchronization when processor frequency
varies. Bidirectional pin with internal pull-up.
Note: LOW on RTCK while RESET
is LOW enables pins P1[31:26] to
operate as Debug port after reset.
P1.27/TDO 64
[6]
I/O P1.27 — General purpose input/output digital pin (GPIO).
O TDO — Test Data out for JTAG interface.
P1.28/TDI 60
[6]
I/O P1.28 — General purpose input/output digital pin (GPIO).
I TDI — Test Data in for JTAG interface.
P1.29/TCK 56
[6]
I/O P1.29 — General purpose input/output digital pin (GPIO).
I TCK — Test Clock for JTAG interface. This clock must be slower than
1
6
of the CPU clock (CCLK) for the JTAG interface to operate.
P1.30/TMS 52
[6]
I/O P1.30 — General purpose input/output digital pin (GPIO).
I TMS — Test Mode Select for JTAG interface.
P1.31/TRST
20
[6]
I/O P1.31 — General purpose input/output digital pin (GPIO).
I TRST
Test Reset for JTAG interface.
D+ 10
[7]
I/O USB bidirectional D+ line.
D 11
[7]
I/O USB bidirectional D line.
RESET
57
[8]
I External reset input: A LOW on this pin resets the device, causing
I/O ports and peripherals to take on their default states, and processor
execution to begin at address 0. TTL with hysteresis, 5 V tolerant.
XTAL1 62
[9]
I Input to the oscillator circuit and internal clock generator circuits.
XTAL2 61
[9]
O Output from the oscillator amplifier.
RTCX1 3
[9][10]
I Input to the RTC oscillator circuit.
RTCX2 5
[9][10]
O Output from the RTC oscillator circuit.
V
SS
6, 18, 25, 42,
50
I Ground: 0 V reference.
V
SSA
59 I Analog ground: 0 V reference. This should nominally be the same
voltage as V
SS
, but should be isolated to minimize noise and error.
V
DD
23, 43, 51 I 3.3 V power supply: This is the power supply voltage for the core and
I/O ports.
Table 3. Pin description …continued
Symbol Pin Type Description
LPC2141_42_44_46_48 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 12 August 2011 12 of 45
NXP Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
[1] 5 V tolerant pad (no built-in pull-up resistor) providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
[2] 5 V tolerant pad (no built-in pull-up resistor) providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control. If
configured for an input function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns.
[3] Open-drain 5 V tolerant digital I/O I
2
C-bus 400 kHz specification compatible pad. It requires external pull-up to provide an output
functionality.
[4] 5 V tolerant pad (no built-in pull-up resistor) providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog
input function. If configured for an input function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns. When
configured as an ADC input, digital section of the pad is disabled.
[5] 5 V tolerant pad (no built-in pull-up resistor) providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog
output function. When configured as the DAC output, digital section of the pad is disabled.
[6] 5 V tolerant pad with built-in pull-up resistor providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
The pull-up resistor’s value typically ranges from 60 k to 300 k.
[7] Pad is designed in accordance with the Universal Serial Bus (USB) specification, revision 2.0 (Full-speed and Low-speed mode only).
[8] 5 V tolerant pad providing digital input (with TTL levels and hysteresis) function only.
[9] Pad provides special analog functionality.
[10] When unused, the RTCX1 pin can be grounded or left floating. For lowest power leave it floating.
The other RTC pin, RTCX2, should be left floating.
V
DDA
7IAnalog 3.3 V power supply: This should be nominally the same
voltage as V
DD
but should be isolated to minimize noise and error.
This voltage is only used to power the on-chip ADC(s) and DAC.
VREF 63 I ADC reference voltage: This should be nominally less than or equal
to the V
DD
voltage but should be isolated to minimize noise and error.
Level on this pin is used as a reference for ADC(s) and DAC.
VBAT 49 I RTC power supply voltage: 3.3 V on this pin supplies the power to
the RTC.
Table 3. Pin description
…continued
Symbol Pin Type Description

LPC2148FBD64,151

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
ARM Microcontrollers - MCU ARM7 512KF/40KR/USB
Lifecycle:
New from this manufacturer.
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