LOW SKEW, 1-TO-9
LVCMOS / LVTTL CLOCK MULTIPLIER
87950I DATA SHEET
4 REVISION C 11/6/15
TABLE 3F. INPUT REFERENCE VS. OUTPUT FREQUENCY RELATIONSHIP
Inputs Outputs
DIV_SELA DIV_SELB DIV_SELC DIV_SELD
FBDIV_SEL = 1 FBDIV_SEL = 0
QA QB QCx QDx QA QB QCx QDx
00004x2x2x2x8x4x4x4x
00014x2x2xx8x4x4x2x
00104x2xx2x8x4x2x4x
00114x2xxx8x4x2x2x
01004xx2x2x8x2x4x4x
01014xx2xx8x2x4x2x
01104xxx2x8x2x2x4x
01114xxxx8x2x2x2x
10002x2x2x2x4x4x4x4x
10012x2x2xx4x4x4x2x
10102x2xx2x4x4x2x4x
10112x2xxx4x4x2x2x
11002xx2x2x4x2x4x4x
11012xx2xx4x2x4x2x
11102xxx2x4x2x2x4x
11112xxxx4x2x2x2x
Inputs Outputs
DIV_SELA DIV_SELB DIV_SELC DIV_SELD QA QB QCx QDx
0000VCO/2 VCO/4 VCO/4 VCO/4
0001VCO/2 VCO/4 VCO/4 VCO/8
0010VCO/2 VCO/4 VCO/8 VCO/4
0011VCO/2 VCO/4 VCO/8 VCO/8
0100VCO/2 VCO/8 VCO/4 VCO/4
0101VCO/2 VCO/8 VCO/4 VCO/8
0110VCO/2 VCO/8 VCO/8 VCO/4
0111VCO/2 VCO/8 VCO/8 VCO/8
1000VCO/4 VCO/4 VCO/4 VCO/4
1001VCO/4 VCO/4 VCO/4 VCO/8
1010VCO/4 VCO/4 VCO/8 VCO/4
1011VCO/4 VCO/4 VCO/8 VCO/8
1100VCO/4 VCO/8 VCO/4 VCO/4
1101VCO/4 VCO/8 VCO/4 VCO/8
1110VCO/4 VCO/8 VCO/8 VCO/4
1111VCO/4 VCO/8 VCO/8 VCO/8
TABLE 3E. PROGRAMMABLE OUTPUT FREQUENCY FUNCTION TABLE
REVISION C 11/6/15
87950I DATA SHEET
5 LOW SKEW, 1-TO-9
LVCMOS / LVTTL CLOCK MULTIPLIER
TABLE 6. PLL INPUT REFERENCE CHARACTERISTICS, V
DDA
= V
DDO
= 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
REF
Input Reference Frequency; NOTE 1 15 62.5 MHz
NOTE 1: Maximum and minimum input reference is limited by the VCO lock range and the feedback divider for the
CLK input.
TABLE 5. CRYSTAL CHARACTERISTICS, V
DDA
= V
DDO
= 3.3V±5%, TA = -40°C TO 85°C
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
Frequency 15 40 MHz
Equivalent Series Resistance (ESR) 50
Ω
Shunt Capacitance 7pF
Drive Level 1mW
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, V
DDA
= V
DDO
= 3.3V±5%, TA = -40°C TO 85°C
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, V
DDA
= V
DDO
= 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2 V
DD
+ 0.3 V
V
IL
Input Low Voltage -0.3 0.8 V
I
IN
Input Current V
DDA
=V
IN
= 3.465V ±120 µA
V
OH
Output High Voltage; NOTE 1 2.6 V
V
OL
Output Low Voltage; NOTE 1 0.5 V
NOTE 1: Outputs terminated with 50Ω to V
DDO
/2.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DDA
Analog Supply Voltage 3.135 3.3 3.465 V
V
DDO
Output Supply Voltage 3.135 3.3 3.465 V
I
DDA
Analog Supply Current 15 mA
I
DDO
Output Supply Current 115 mA
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DDA
+ 0.5 V
Outputs, V
O
-0.5V to V
DDO
+ 0.5V
Package Thermal Impedance, θ
JA
42.1°C/W (0 lfpm)
Storage Temperature, T
STG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifi cations only. Functional
operation of product at these conditions or any conditions
beyond those listed in the DC Characteristics or AC Charac-
teristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
LOW SKEW, 1-TO-9
LVCMOS / LVTTL CLOCK MULTIPLIER
87950I DATA SHEET
6 REVISION C 11/6/15
TABLE 7. AC CHARACTERISTICS, V
DDA
= V
DDO
= 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency
÷2
250 MHz
÷4
125 MHz
÷8
62.5 MHz
f
VCO
PLL VCO Lock Range 240 500 MHz
Tsk(o)
Output Skew;
NOTE 1, 4
Same Frequency 375 ps
Different Frequency
QA f
MAX
< 150MHz 500 ps
QA f
MAX
> 150MHz 750 ps
Tjit(cc) Cycle-to-Cycle Jitter; NOTE 2, 4 ±100 ps
t
L
PLL Lock Time; NOTE 4 10 mS
t
R
/ t
F
Output Rise/Fall Time 0.8V to 2V 0.1 1 ns
t
PW
Output Pulse Width; NOTE 3 t
PERIOD
/2 - 1000 t
PERIOD
/2 + 1000 ps
t
PZL
, t
PZH
Output Enable Time 6ns
t
PLZ,
, t
PHZ
Output Disable Time 7ns
All parameters measured at
f
MAX
unless noted otherwise.
NOTE 1: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
Measured at V
DDO
/2.
NOTE 2: Jitter performance using Xtal inputs.
NOTE 3: Measured using CLK.
NOTE 4: This parameter is defi ned in accordance with JEDEC Standard 65.

87950BYILF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products 9 LVCMOS OUT CLOCK GENERATOR
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet