LTC3025EDC-3#TRPBF

LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
10
30251234ff
applicaTions inForMaTion
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be the output current
multiplied by the input/output voltage differential:
(I
OUT
) (V
IN
– V
OUT
)
Note that the BIAS current is less than 500µA even under
heavy loads, so its power consumption can be ignored
for thermal calculations.
The LTC3025-X has internal thermal limiting designed to
protect the device during momentary overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat-spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through holes can also be used to spread the heat gener-
ated by power devices.
The LTC3025-X 2mm × 2mm DFN package is specified
as having a junction-to-ambient thermal resistance of
102°C/W, which assumes a minimal heat spreading cop-
per plane. The actual thermal resistance can be reduced
substantially by connecting the package directly to a good
heat spreading ground plane. When soldered to 2500mm
2
double-sided 1 oz. copper plane, the actual junction-to-
ambient thermal resistance can be less than 60°C/W.
Calculating Junction Temperature
Example: Given an output voltage of 1.2V, an input voltage
of 1.8V to 3V, an output current range of 0mA to 100mA
and a maximum ambient temperature of 50°C, what will
the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX)
(V
IN(MAX)
– V
OUT
)
where:
I
OUT(MAX)
= 100mA
V
IN(MAX)
= 3V
So:
P = 100mA(3V – 1.2V) = 0.18W
Even under worst-case conditions, the LTC3025-X’s BIAS
pin power dissipation is only about 1mW, thus can be ig-
nored. Assuming a junction-to-ambient thermal resistance
of 102°C/W, the junction temperature rise above ambient
will be approximately equal to:
0.18W(102°C/W) = 18.4°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
J
= 50°C + 18.4°C = 68.4°C
Short-Circuit/Thermal Protection
The LTC3025-X has built-in short-circuit current limiting
as well as overtemperature protection. During short-circuit
conditions, internal circuitry automatically limits the output
current to approximately 1130mA. At higher temperatures,
or in cases where internal power dissipation causes exces-
sive self heating on chip, the thermal shutdown circuitry
will shut down the LDO when the junction temperature
exceeds approximately 150°C. It will re enable the LDO
once the junction temperature drops back to approximately
140°C. The LTC3025-X will cycle in and out of thermal
shutdown without latch-up or damage until the overstress
condition is removed. Long term overstress (T
J
> 125°C)
should be avoided as it can degrade the performance or
shorten the life of the part.
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
11
30251234ff
Figure 5. Output Start-Up and Shutdown
OFF
1.2V
0V
ON
SHDN
V
OUT
200mV/DIV
T
A
= 25°C
V
IN
= 1.5V
V
BIAS
= 3.6V
C
OUT
= 1µF
R
LOAD
= 4Ω
500µs/DIV
30251234 F05
applicaTions inForMaTion
Soft-Start Operation
The LTC3025-X includes a soft-start feature to prevent
excessive current flow during start-up. When the LDO is
enabled, the soft-start circuitry gradually increases the
LDO reference voltage from 0V to 0.4V over a period of
about 600µs. There is a short 700µs delay from the time
the part is enabled until the LDO output starts to rise. Fig-
ure 5 shows the start-up and shutdown output waveform.
V
OUT
Start-Up and Supply Sequencing
During power-up, the output shutdown circuitry is not
active below V
IN
of about 0.65V DC (typical). As a result,
the output voltage can drift up during power-up due to
leakage current (<1 mA typical) from V
IN
to V
OUT
. At 0.9V
input, the shutdown circuitry is active and the output is
actively held off. This usually causes no circuit problems
and is similar to 3-terminal regulators such as the LT3080,
LT1086 and LT317 which have no ground pin and can have
the output rise under some conditions. A slowly rising
V
IN
with the part enabled may result in non-monotonic
ramping of V
OUT
due to LDO circuitry becoming active at
V
IN
of about 0.65V (typical) as well.
With fast rising inputs (>1V/ms) or with sufficient resis-
tive load on V
OUT
, output voltage rise during power-up
is reduced or eliminated. Such conditions also reduce or
eliminate non-monotonic initial power-up with the part
enabled. If V
BIAS
is sequenced up before V
IN
, the leakage
current from V
IN
to V
OUT
may increase until the shutdown
circuitry is active at a V
IN
of about 0.65V typical. Thus,
to minimize V
OUT
rise during start-up, sequence up V
IN
before V
BIAS
. At V
IN
= 0.9V, the output is actively held off
in shutdown or it is actively held on when enabled under
all conditions.
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
12
30251234ff
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
package DescripTion
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703 Rev B)
2.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
0.56 ± 0.05
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
R = 0.05
TYP
1.37 ±0.05
(2 SIDES)
1
3
64
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DC6) DFN REV B 1309
0.25 ± 0.05
0.50 BSC
0.25 ± 0.05
1.42 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 ±0.05
(2 SIDES)
1.15 ±0.05
0.70 ±0.05
2.55 ±0.05
PACKAGE
OUTLINE
0.50 BSC
PIN 1 NOTCH
R = 0.20 OR
0.25 × 45°
CHAMFER

LTC3025EDC-3#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 1.5V, 500 mA Micropower, VLDO Linear Regulator
Lifecycle:
New from this manufacturer.
Delivery:
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