DC and AC parameters M34D64-W
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Table 11. AC characteristics
Test conditions specified in Table 8.: AC measurement conditions and Table 7.: Operating
conditions
Symbol Alt. Parameter Min. Max. Unit
f
C
f
SCL
Clock frequency 400 kHz
t
CHCL
t
HIGH
Clock pulse width high 600 ns
t
CLCH
t
LOW
Clock pulse width low 1300 ns
t
CH1CH2
t
R
Clock rise time 300 ns
t
CL1CL2
t
F
Clock fall time 300 ns
t
DH1DH2
(1)
1. Sampled only, not 100% tested.
t
R
SDA rise time 20 300 ns
t
DL1DL2
(1)
t
F
SDA fall time 20 300 ns
t
DXCX
t
SU:DAT
Data in setup time 100 ns
t
CLDX
t
HD:DAT
Data in hold time 0 ns
t
CLQX
t
DH
Data out hold time 200 ns
t
CLQV
(2)
2. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or
rising edge of SDA.
t
AA
Clock low to next data valid (access time) 200 900 ns
t
CHDX
(3)
3. For a reStart condition, or following a Write cycle.
t
SU:STA
Start condition setup time 600 ns
t
DLCL
t
HD:STA
Start condition hold time 600 ns
t
CHDH
t
SU:STO
Stop condition setup time 600 ns
t
DHDL
t
BUF
Time between Stop condition and next Start
condition
1300 ns
t
W
t
WR
Write time 5 ms
